softfloat-native currently only supports one FPU context, while we need
at least 3 of them for the PPC target (FPU, SPE, AVR).
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6041 c046a42c-6fe2-441c-8c8c-71466251a162
r5953 managed to quite most colorgcc errors leakage to console
but not all of them.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6040 c046a42c-6fe2-441c-8c8c-71466251a162
The TSC2102 chip is not included in documentation because a patch is
pending.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6038 c046a42c-6fe2-441c-8c8c-71466251a162
The instructions are specified to update the condition register even if
an error is to be signaled because of NaN input.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6034 c046a42c-6fe2-441c-8c8c-71466251a162
Remove dyngen and dyngen.dSYM from svn property svn:ignore
Add *-bsd-user and qemu-nbd.pod to the svn property svn:ignore and .gitignore
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6022 c046a42c-6fe2-441c-8c8c-71466251a162
Hollis Blanchard noticed that the last commit was not sufficient. We also need
to initialize the msr size in our newly allocated list.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6018 c046a42c-6fe2-441c-8c8c-71466251a162
I believe this was spotted by Gerd Hoffman but I can't find his patch
now. This will cause very subtle corruption on the heap because we
don't allocate the appropriately sized buffer.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6017 c046a42c-6fe2-441c-8c8c-71466251a162
Based on a patch from Lionel Landwerlin.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6015 c046a42c-6fe2-441c-8c8c-71466251a162
Starting with version 4.3, gcc returns the result of a function in
rax/eax/ax/al instead of rax/eax, depending of the return type. As
a consequence we should use a zero extend moe in TCG loads/stores.
See http://gcc.gnu.org/ml/gcc/2008-01/msg00052.html for more details.
A big thanks to malc who founds the problem and wrote the x86 patch.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6011 c046a42c-6fe2-441c-8c8c-71466251a162
vnc_state->display is set to NULL after "change vnc none" but vnc_state itself
is still valid.
(James Ko)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6010 c046a42c-6fe2-441c-8c8c-71466251a162
SVM specifies that the V_IRQ mask is only to be removed, if the
interrupt that is to be delivered actually is delivered.
As of the SVM rewrite, this mask is always unmasked when the main cpu
loop is processed, leaving a corner case where calling the interrupt
handler causes a #PF. In that case (booting Linux / starting gfxboot)
the current implementation tells the VMM the interrupt is taken, even
though it is not.
This patch modifies the VIRQ unmasking to occur after do_interrupt,
making gfxboot work again.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6008 c046a42c-6fe2-441c-8c8c-71466251a162
Remove some unnecessary includes, add needed includes, move prototypes to
cpu.h to suppress missing prototype warnings.
Remove unused functions and prototypes (cpu_x86_flush_tlb, cpu_lock,
cpu_unlock, restore_native_fp_state, save_native_fp_state).
Make some functions and data static (f15rk, parity_table, rclw_table,
rclb_table, raise_interrupt, fpu_raise_exception), they are not used
outside op_helper.c anymore.
Make some x86_64 and user only code conditional to avoid warnings.
Document where each function is implemented in cpu.h and exec.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6005 c046a42c-6fe2-441c-8c8c-71466251a162
Looking at tcg/tcg.c:828, the bug that the warning indicated would show up as
incorrect PC shown in log, only on 32 bit big endian host emulating a 64 bit
target, -d op flag enabled. Now that dyngen is gone, the patch can be applied.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5998 c046a42c-6fe2-441c-8c8c-71466251a162
This is really a stop-gap. The recent thread pool changes uncovered a
deeper issue with how we use librt. We really should be probing for
timer_create and then conditionally enabling that code.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5997 c046a42c-6fe2-441c-8c8c-71466251a162
glibc implements posix-aio as a thread pool and imposes a number of limitations.
1) it limits one request per-file descriptor. we hack around this by dup()'ing
file descriptors which is hideously ugly
2) it's impossible to add new interfaces and we need a vectored read/write
operation to properly support a zero-copy API.
What has been suggested to me by glibc folks, is to implement whatever new
interfaces we want and then it can eventually be proposed for standardization.
This requires that we implement our own posix-aio implementation though.
This patch implements posix-aio using pthreads. It immediately eliminates the
need for fd pooling.
It performs at least as well as the current posix-aio code (in some
circumstances, even better).
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5996 c046a42c-6fe2-441c-8c8c-71466251a162
I'm not familiar with this device, but I'm fairly certain the writel handler is
not supposed to recurse.
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5995 c046a42c-6fe2-441c-8c8c-71466251a162
aurel32
balrog
blueswir1
aliguori
malc