Commit Graph

250 Commits

Author SHA1 Message Date
Stefan Weil
4b4a72e556 Fix conversions from pointer to tcg_target_long
tcg_gen_exit_tb takes a parameter of type tcg_target_long,
so the type casts of pointer to long should be replaced by
type casts of pointer to tcg_target_long (suggested by Blue Swirl).

These changes are needed for build environments where
sizeof(long) != sizeof(void *), especially for w64.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10 00:45:16 +02:00
Fabien Chouteau
4a2ba23284 SPARC: Add asr17 register support
This register is activated by CPU_FEATURE_ASR17 in the feature field.

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-24 20:54:34 +00:00
Fabien Chouteau
b04d989054 SPARC: Emulation of Leon3
Leon3 is an open-source VHDL System-On-Chip, well known in space industry (more
information on http://www.gaisler.com).

Leon3 is made of multiple components available in the GrLib VHDL library.
Three devices are implemented: uart, timers and IRQ manager.
You can find code for these peripherals in the grlib_* files.

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-24 20:54:34 +00:00
Aurelien Jarno
0fcec41eec target-sparc: fix udiv(cc) and sdiv(cc)
Since commit 5a4bb580cd, Xorg crashes on
a Debian Etch image. The commit itself is fine, but it triggers a bug
due to wrong computation of flags for udiv(cc) and sdiv(cc).

This patch only compute cc_src2 for the cc version of udiv/sdiv. It
also moves the update of cc_dst and cc_op to the helper, as it is
faster doing it here when there is already an helper.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-12-28 18:44:51 +00:00
Igor V. Kovalenko
fb170183e7 sparc64: fix umul and smul insns
- truncate and sign or zero extend operands before multiplication
- factor out common code to gen_op_multiply() with parameter to sign/zero extend
- call gen_op_multiply from gen_op_umul and gen_op_smul

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02 20:08:44 +00:00
Igor V. Kovalenko
fe987e2394 sparc64: fix ldxfsr insn
- rearrange code to break from switch when appropriate
- allow deprecated ldfsr insn

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02 20:05:30 +00:00
Igor V. Kovalenko
1295001c53 sparc64: fix missing address masking v1
- address masking for ldqf and stqf insns
- address masking for lddf and stdf insns
- address masking for translating ASI (Ultrasparc IIi)
v0->v1:
- move arch-specific code to helpers and drop more ifdefs at call sites
  using new helper asi_address_mask()
- change user emulation to use asi_address_mask()

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-06-02 20:03:52 +00:00
Igor V. Kovalenko
9fd1ae3a0e sparc64: fix mmu context at trap levels above zero
- cpu_mmu_index return MMU_NUCLEUS_IDX if trap level is not zero
- cpu_get_tb_cpu_state: store trap level and primary context in flags
  this allows to restart code translation when address translation is changed
- stop translation block after writing to pstate and tl registers
- stop translation block after writing to alternate space
  this can be optimized to stop only if address translation can be changed
  by write operation (e.g. by comparing with MMU ASI values)

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22 12:51:48 +00:00
Igor V. Kovalenko
2aae2b8e0a sparc64: fix pstate privilege bits
- refactor code to handle hpstate only if available for current cpu
- conditionally set hypervisor bit in hpstate register
- reorder softmmu indices so user accessable ones go first, translation context
  macros supervisor() and hypervisor() adjusted as well
- disable sparcv8 registers for TARGET_SPARC64
- fix cpu_mmu_index to use sparcv9 bits only

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22 12:48:52 +00:00
Richard Henderson
70c482852a target-sparc: Inline some generation of carry for ADDX/SUBX.
Computing carry is trivial for some inputs.  By avoiding an
external function call, we generate near-optimal code for
the common cases of add+addx (double-word arithmetic) and
cmp+addx (a setcc pattern).

Signed-off-by: Richard Henderson <rth@twiddle.net>
Acked-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-20 19:58:28 +00:00
Blue Swirl
275ea26546 sparc: lazy C flag calculation
Calculate only the carry flag for ADDX/SUBX instead of full
set of flags.

Thanks to Igor Kovalenko for spotting a bug with an earlier
version.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-09 15:40:24 +00:00
Richard Henderson
060718c194 target-sparc: Fix -singlestep.
Single-stepping was not properly updating npc, resulting in some
instructions being executed twice.  In addition, we were emitting
dead code at the end of the TB.

Fix both by teaching gen_goto_tb to avoid goto_tb for single-step
and removing the special-case code in gen_intermediate_code_internal.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-26 17:23:58 +00:00
Blue Swirl
6ad6135dca Fix harmless if statements with empty body, spotted by clang
These clang errors are harmless but worth fixing:
  CC    ppc-softmmu/usb-ohci.o
/src/qemu/hw/usb-ohci.c:1104:59: error: if statement has empty body [-Wempty-body]
                          ohci->ctrl_head, ohci->ctrl_cur);
/src/qemu/hw/usb-ohci.c:1371:57: error: if statement has empty body [-Wempty-body]
        DPRINTF("usb-ohci: port %d: SUSPEND\n", portnum);
  CC    sparc64-softmmu/translate.o
/src/qemu/target-sparc/translate.c:3173:37: error: if statement has empty body [-Wempty-body]
                                    ; // XXX

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-18 14:22:14 +00:00
Richard Henderson
42a8aa8393 target-sparc: Free instruction temporaries.
Rather than creating new temporaries for constants, use the
ones created in disas_sparc_insn.  Remember the temps created
there so that they can be freed at the end of the function.

Profile data collected by TCG while booting sparc-test kernel:

-avg temps/TB    70.61 max=421
+avg temps/TB    62.75 max=66

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-17 16:25:08 +00:00
Blue Swirl
cca1d527ef Sparc: fix PC/NPC during FPU traps
All FPU instructions can trap, so save PC/NPC state before
executing them.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-17 16:25:04 +00:00
Blue Swirl
d7da2a1040 Sparc: fix exceptions in delay slot
Fix a case where an exception happens with the
instruction in the delay slot.

Recovery of branch condition in the exception handling
code was not converted to TCG. Because the condition
was bogus, wrong NPC could be selected from the two
candidates.

A nice bug report with a test case can be found in:
https://bugs.launchpad.net/qemu/+bug/551814

Fix based on patch by Fabrice Bellard.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-11 19:47:49 +00:00
Paolo Bonzini
1a7ff92218 remove TARGET_* defines from translate-all.c
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08 21:34:12 +02:00
Stefan Weil
bc57c114b0 target-sparc: fix --enable-debug build for 64 bit host
b551ec04ca fixed
the compilation for 32 bit hosts, but introduced
a new error for 64 bit hosts:

tcg_temp_new_ptr needs a matching tcg_temp_free_ptr.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-25 18:26:25 +00:00
Jay Foad
b551ec04ca target-sparc: fix --enable-debug build
Use 32-bit arithmetic for the address offset calculation to fix a
build failure on 32-bit hosts.

Signed-off-by: Jay Foad <jay.foad@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-20 13:09:57 +02:00
Igor V. Kovalenko
1fae7b705f sparc64: use helper_wrpil to check pending irq on write
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-08 17:14:11 +00:00
Igor V. Kovalenko
01b5d4e5cc sparc64-8bit-asi
Sparc64 alternate space load/store helpers expect 8 bit ASI value,
while wrasi implementation sign-extends ASI operand causing
for example 0x80 to appear as 0xFFFFFF80. Resulting value falls
out of switch in helpers and causes obscure load/store faults.

- correct wrasi by masking lower 8 bits of xor result
- use lower 8 bits of ASI register in helpers

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-23 20:00:24 +00:00
Blue Swirl
72cf2d4f0e Fix sys-queue.h conflict for good
Problem: Our file sys-queue.h is a copy of the BSD file, but there are
some additions and it's not entirely compatible. Because of that, there have
been conflicts with system headers on BSD systems. Some hacks have been
introduced in the commits 15cc923584,
f40d753718,
96555a96d7 and
3990d09adf but the fixes were fragile.

Solution: Avoid the conflict entirely by renaming the functions and the
file. Revert the previous hacks.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-12 07:36:22 +00:00
Blue Swirl
c27e27528f Sparc32/64: fix jmpl followed by branch
Fix a case where 'jmpl' instruction followed by a branch instruction was
handled incorrectly.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-22 11:46:10 +00:00
Blue Swirl
cfa90513a3 Fix desynchronization of condition code state when a memory access traps
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-15 16:52:54 +00:00
Igor Kovalenko
8194f35a0c Sparc64: replace tsptr with helper routine
tl and tsptr of members sparc64 cpu state must be changed
simultaneously to keep trap state window in sync with current
trap level. Currently translation of store to tl does not change
tsptr, which leads to corrupt trap state on corresponding
trap level.

This patch removes tsptr from sparc64 cpu state and replaces
all uses with call to helper routine.

Changes v0->v1:
- reimplemented helper routine with tcg generator
- on cpu reset trap type and pstate are populated with power-on reset
values, including tl=maxtl

Signed-off-by: igor.v.kovalenko@gmail.com
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-04 20:22:10 +00:00
Igor Kovalenko
14ed7adc1b sparc64 flush pending conditional evaluations before exposing cpu state
If translation block is interrupted by e.g. mmu exception
we need to compute conditional flags for inclusion into
saved cpu state. Otherwise after return from trap
conditional instructions would use stale psr/xcc data.

Signed-off-by: igor.v.kovalenko@gmail.com

--
Kind regards,
Igor V. Kovalenko
2009-07-31 06:48:47 +00:00
Blue Swirl
8167ee8839 Update to a hopefully more future proof FSF address
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 20:47:01 +00:00
Paul Brook
25517f999f Use correct type for SPARC cpu_cc_op
Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-06-06 02:54:03 +01:00
Blue Swirl
d084469ca0 Convert mulscc
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:43:21 +00:00
Blue Swirl
6c78ea32e1 Convert udiv/sdiv
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:42:54 +00:00
Blue Swirl
3b2d1e9286 Convert tagged ops
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 10:38:35 +03:00
Blue Swirl
2ca1d92b07 Convert subx
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 10:38:34 +03:00
Blue Swirl
d4b0d46898 Convert sub
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 10:38:34 +03:00
Blue Swirl
38482a77f0 Convert logical operations and umul/smul
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 10:38:34 +03:00
Blue Swirl
789c91ef39 Convert addx
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:19:22 +00:00
Blue Swirl
bdf9f35dad Convert add
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:19:17 +00:00
Blue Swirl
8393617c1a Use dynamical computation for condition codes
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-10 07:19:11 +00:00
Blue Swirl
719f66a770 Optimize cmp x, 0 case
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-03 18:51:27 +00:00
Blue Swirl
dc1a6971e3 Reindent
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-03 18:51:22 +00:00
Blue Swirl
b89e94af1d Improve instruction name comments for easier searching
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-02 20:19:46 +00:00
Blue Swirl
41d728522b Optimize operations with immediate parameters 2009-05-02 19:14:05 +00:00
Blue Swirl
67526b2056 Fix Sparc64 sign extension problems
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-05-02 18:58:57 +00:00
aurel32
1b530a6dfc Add new command line option -singlestep for tcg single stepping.
This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.

Add monitor command to enable or disable single step mode.

Modify monitor command "info status" to display single step mode.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-05 20:08:59 +00:00
blueswir1
d78f399542 Delete some unused macros detected with -Wp,-Wunused-macros use
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6856 c046a42c-6fe2-441c-8c8c-71466251a162
2009-03-16 16:33:01 +00:00
aliguori
8fec2b8c45 global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:36:53 +00:00
aliguori
93fcfe39a0 Convert references to logfile/loglevel to use qemu_log*() macros
This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-15 22:34:14 +00:00
aurel32
fad6cb1a56 Update FSF address in GPL/LGPL boilerplate
The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
2009-01-04 22:05:52 +00:00
aliguori
c0ce998e94 Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-25 22:13:57 +00:00
aliguori
a1d1bb3101 Refactor and enhance break/watchpoint API (Jan Kiszka)
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.

Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-18 20:07:32 +00:00
pbrook
a7812ae412 TCG variable type checking.
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-17 14:43:54 +00:00