Commit Graph

14 Commits

Author SHA1 Message Date
Andreas Färber
67c332fd12 pci: Tidy up PCI host bridges
Adopt the QOM parent field name and enforce QOM-style access via casts.
Don't just typedef PCIHostState, either use it directly or embed it.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-22 10:47:17 -05:00
Andreas Färber
8558d942b6 pci: Derive PCI host bridges from TYPE_PCI_HOST_BRIDGE
Use PCIHostState and PCI_HOST_BRIDGE() where appropriate.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-22 10:47:17 -05:00
Andreas Färber
94dd91d651 alpha_typhoon: QOM'ify Typhoon PCI host bridge
Introduce type constant and cast macro. Don't access DeviceState
or PCIHostState indirectly through parent fields.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-22 10:47:15 -05:00
Andreas Färber
4240abff5a pci: Make host bridge TypeInfos const
During the QOM migration they were amended with further info but this is
no longer the case. All static TypeInfos can be const these days.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-08-22 10:47:15 -05:00
Andreas Färber
8b2aee2959 alpha hw/: Don't use CPUState
Scripted conversion:
  for file in hw/alpha_*.[hc]; do
    sed -i "s/CPUState/CPUAlphaState/g" $file
  done

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:26 +01:00
Andreas Färber
83f7d43a9e qom: Unify type registration
Replace device_init() with generalized type_init().

While at it, unify naming convention: type_init([$prefix_]register_types)
Also, type_init() is a function, so add preceding blank line where
necessary and don't put a semicolon after the closing brace.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Cc: Anthony Liguori <anthony@codemonkey.ws>
Cc: malc <av1474@comtv.ru>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-15 09:39:21 -06:00
Anthony Liguori
39bffca203 qdev: register all types natively through QEMU Object Model
This was done in a mostly automated fashion.  I did it in three steps and then
rebased it into a single step which avoids repeatedly touching every file in
the tree.

The first step was a sed-based addition of the parent type to the subclass
registration functions.

The second step was another sed-based removal of subclass registration functions
while also adding virtual functions from the base class into a class_init
function as appropriate.

Finally, a python script was used to convert the DeviceInfo structures and
qdev_register_subclass functions to TypeInfo structures, class_init functions,
and type_register_static calls.

We are almost fully converted to QOM after this commit.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-03 10:41:06 -06:00
Anthony Liguori
999e12bbe8 sysbus: apic: ioapic: convert to QEMU Object Model
This converts three devices because apic and ioapic are subclasses of sysbus.
Converting subclasses independently of their base class is prohibitively hard.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-01-27 10:50:50 -06:00
Avi Kivity
c5705a7728 vmstate, memory: decouple vmstate from memory API
Currently creating a memory region automatically registers it for
live migration.  This differs from other state (which is enumerated
in a VMStateDescription structure) and ties the live migration code
into the memory core.

Decouple the two by introducing a separate API, vmstate_register_ram(),
for registering a RAM block for migration.  Currently the same
implementation is reused, but later it can be moved into a separate list,
and registrations can be moved to VMStateDescription blocks.

Signed-off-by: Avi Kivity <avi@redhat.com>
2012-01-04 13:34:48 +02:00
Hervé Poussineau
71baa3036f alpha: give ISA bus to ISA methods
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-12-20 15:44:30 -06:00
Hervé Poussineau
48a18b3c69 isa: give ISABus/ISADevice to isa_create(), isa_bus_irqs() and isa_get_irq() functions
NULL is a valid bus/device, so there is no change in behaviour.

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-12-20 15:44:30 -06:00
Stefan Weil
02d6516c8b target-alpha: Fix compilation errors for 32 bit hosts
On i386, these errors were reported:

qemu/hw/alpha_dp264.c: In function ‘clipper_init’:
qemu/hw/alpha_dp264.c:158: error: integer constant is too large for ‘unsigned long’ type

qemu/hw/alpha_typhoon.c: In function ‘typhoon_init’:
qemu/hw/alpha_typhoon.c:737: error: integer constant is too large for ‘long’ type
qemu/hw/alpha_typhoon.c:741: error: integer constant is too large for ‘long’ type
qemu/hw/alpha_typhoon.c:745: error: integer constant is too large for ‘long’ type
qemu/hw/alpha_typhoon.c:749: error: integer constant is too large for ‘long’ type
qemu/hw/alpha_typhoon.c:757: error: integer constant is too large for ‘long’ type
qemu/hw/alpha_typhoon.c:767: error: integer constant is too large for ‘long’ type
qemu/hw/alpha_typhoon.c:772: error: integer constant is too large for ‘long’ type

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-09 08:18:30 +00:00
Richard Henderson
c781cf96e2 target-alpha: Add high-resolution access to wall clock and an alarm.
The alarm is a fully general one-shot time comparator, which will be
usable under Linux as a hrtimer source.  It's much more flexible than
the RTC source available on real hardware.

The wall clock allows the guest access to the host timekeeping.  Much
like the KVM wall clock source for other guests.

Both are accessed via the PALcode Cserve entry point.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-08 08:49:09 -07:00
Richard Henderson
80bb2ff770 target-alpha: Add CLIPPER emulation.
This is a DP264 variant, SMP capable, no unusual hardware present.

The emulation does not currently include any PCI IOMMU code.
Hopefully the generic support for that can be merged to HEAD soon.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-08 08:49:09 -07:00