blueswir1
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7c56045670
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Register only valid register access widths
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3881 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-01-01 17:06:38 +00:00 |
pbrook
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87ecb68bdf
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Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-11-17 17:14:51 +00:00 |
ths
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5fafdf24ef
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find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-09-16 21:08:06 +00:00 |
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blueswir1
|
9b5207aabb
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Remove old leftovers
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3121 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-08-16 19:57:27 +00:00 |
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blueswir1
|
2d069bab6a
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Use qemu_irq for a reset signal between DMA and ESP/Lance
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3120 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-08-16 19:56:27 +00:00 |
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blueswir1
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70c0de96a3
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Use qemu_irqs between dma controllers and esp, lance
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2873 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-05-27 16:36:10 +00:00 |
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blueswir1
|
5aca8c3b2f
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Split DMA controller in two
Fix register size related bugs
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2869 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-05-26 17:39:43 +00:00 |
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blueswir1
|
5dcb6b914e
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Use full 36-bit physical address space on SS10
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2830 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-05-19 12:58:30 +00:00 |
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pbrook
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d537cf6c86
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Unify IRQ handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-04-07 18:14:41 +00:00 |
bellard
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9b94dc325b
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better PCNET endianness support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2147 c046a42c-6fe2-441c-8c8c-71466251a162
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2006-09-03 19:48:17 +00:00 |
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bellard
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67e999be93
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Separate the DMA controllers - Convert ESP to new DMA methods (Blue Swirl)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2143 c046a42c-6fe2-441c-8c8c-71466251a162
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2006-09-03 16:09:07 +00:00 |