Commit Graph

5295 Commits

Author SHA1 Message Date
aurel32 a5e26afa61 ppc: Convert FPR moves to TCG
Replace op_{load,store}_fpr with tcg_gen_mov_i64.
Introduce i64 TCG variables cpu_fpr[0..31] and cpu_FT[0..2].

This obsoletes op_template.h for REG > 7.

Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5156 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-04 14:43:54 +00:00
aurel32 1d54269590 ppc: Convert Altivec register moves to TCG
Replace op_{load,store}_avr with helpers gen_{load,store}_avr.
Introduce two sets of i64 TCG variables, cpu_avr{h,l}[0..31], and
cpu_AVR{h,l}[0..2].

Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5155 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-04 14:43:45 +00:00
aurel32 bd7d9a6d7b ppc: cleanup register types
- use target_ulong for gpr and dyngen registers
- remove ppc_gpr_t type
- define 64-bit dyngen registers for GPE register on 32-bit targets

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5154 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-04 05:26:09 +00:00
aurel32 f78fb44e82 ppc: Convert GPR moves to TCG
Replace op_load_gpr_{T0,T1,T2} and op_store_{T0,T1,T2} with tcg_gen_mov_tl.
Introduce TCG variables cpu_gpr[0..31].

For the SPE extension, assure that ppc_gpr_t is only uint64_t for ppc64.
Introduce TCG variables cpu_gprh[0..31] for upper 32 bits on ppc and helpers
gen_{load,store}_gpr64. Based on suggestions by Aurelien, Thiemo and Blue.

Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5153 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-04 05:25:47 +00:00
aurel32 4f821e1757 alpha: convert a few more instructions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5152 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-04 04:36:20 +00:00
aurel32 3761035f2c alpha: directly access ir registers
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5151 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-04 04:36:00 +00:00
aurel32 496cb5b921 convert of few alpha insn to TCG
(based on a patch from Tristan Gingold)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5150 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-04 04:35:40 +00:00
aurel32 841c26a0c7 hw/pcnet: use qemu_socket.h
(Jan Kiszka)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5149 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-04 04:35:20 +00:00
blueswir1 e83ce55068 Implement no-fault loads
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5148 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-03 17:32:10 +00:00
edgar_igl 4487fd349b ETRAX-FS: Add support for DMA channel resets, needed for recent linux kernels.
* Correct numeric value for the RST state.
* Add emulation for reseting a DMA channel.
* Add a few sanity checks.
* Make it compile with debug enabled.



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5147 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-03 14:40:17 +00:00
edgar_igl b23761f959 CRIS: Avoid a few unecessary steps in the mmu.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5146 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-03 14:31:11 +00:00
edgar_igl 7d5099d5a4 CRIS: Remove redundant code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5145 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-03 14:30:27 +00:00
ths 04ba529f81 Delete unused variable.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5144 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 23:55:28 +00:00
aurel32 f0413473ff [ppc] Convert op_moven_T2_T0 to TCG
Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5143 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 23:26:40 +00:00
aurel32 86c581dc80 [ppc] Convert op_reset_T0, op_set_{T0, T1} to TCG
Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5142 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 23:26:32 +00:00
aurel32 b2463a64ec SH4: R2D-PLUS FPGA: simply unassigned memory triggering
Use NULL to trigger unassigned memory error on 32-bit accesses instead
of assert(0) as suggested by Blue Swirl.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5141 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 23:26:23 +00:00
aurel32 d317b92da0 hw/pcnet.c: windows compile fix
(Eduardo Felipe)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5140 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 23:26:13 +00:00
ths f8a6ec5817 Build fix for gcc-3.3.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5139 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 17:39:45 +00:00
blueswir1 b991c38519 Fix sign extension problems with smul and umul (Vince Weaver)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5138 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 16:33:23 +00:00
aurel32 e55fd9340e [ppc] Convert op_move_{T1,T2}_T0 to TCG
Attached patch replaces op_move_T1_T0 and op_move_T2_T0 with
tcg_gen_mov_tl.

Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5137 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 16:19:05 +00:00
aurel32 02f4f6c24c [ppc] Convert gen_set_{T0,T1} to TCG
The attached patch replaces gen_set_T0 and gen_set_T1 with
tcg_gen_movi_tl.

Signed-off-by: Andreas Faerber <andreas.faerber@web.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5136 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 16:18:55 +00:00
aurel32 89b190a2bb pcnet: add loopback mode emulation
This patch enhances the pcnet NIC emulation with better loopback mode
support, including CRC generation for looped-back packets in "raw" mode.
The patch has practically no impact on the normal RX and TX path.

Successfully tested against an ancient proprietary pcnet driver that
does a lot of hardware checks on boot-up and now works fine over qemu as
well.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5135 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 16:18:46 +00:00
aurel32 b319feb72d sh4: Add R2D-PLUS FPGA support.
This adds trivial support for the R2D-PLUS FPGA, mostly just for the
versioning information that the kernel uses for IRL mappings, in addition
to handling the heartbeat and poweroff writes.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5134 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 16:18:38 +00:00
aurel32 0fd3ca30c4 sh4: CPU versioning.
Trivial patch adding CPU listing and the ability to do per-subtype
CVR/PVR/PRR values. Presently SH7750R and SH7751R definitions are
provided, as these are the ones in present use in-tree.

The CVR value for SH7751R is intentionally restricted so the kernel
boots, though this will want to be switched to the proper CVR value
once system emulation has sufficiently stabilized.

This also makes it trivial to abstract subtype specific registers like
MMU_PTEA and to set up feature bits in line with the kernel probing for
things like conditionalizing FPU/DSP context.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5133 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 16:18:28 +00:00
aurel32 86e0abc767 SH4: fix a regression introduced in r5122
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5132 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 08:42:16 +00:00
aurel32 7c9bde4569 Fix call_pal() prototype for alpha system emulation
(Hervé Poussineau)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5131 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 00:09:35 +00:00
aurel32 9669d3c570 x86: Fix powerdown for non-ACPI case
Trivial fix for a corner case: system_shutdown on isapc machines causes
qemu to segfaults due to accessing the uninitialized pm_state. Issue a
system shutdown instead.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5130 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 00:09:25 +00:00
aurel32 7b45522533 Fix typo in console.c comment
Signed-off-by: Ryan Harper <ryanh@us.ibm.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5129 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 00:09:16 +00:00
aurel32 fec5fa0210 Reset I32_APIC_BASE on system RESET
Should be done according to spec.

Signed-off-by: Gleb Natapov <gleb@qumranet.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5128 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 00:09:08 +00:00
aurel32 37e828b44b suppress a couple of spurious warnings in scsi-generic.c
This patch fixes two spurious `may be used uninitialised' warnings
when compiling with some compilers.

Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: Ian Jackson <ian.jackson@eu.citrix.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5127 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-02 00:08:58 +00:00
aurel32 17b086f71b SH4: Remove dyngen leftovers
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5126 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-01 22:12:14 +00:00
aurel32 7fdf924fdd SH4: final conversion to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5125 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-01 22:12:06 +00:00
aurel32 cc4ba6a982 SH4: convert floating-point ops to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5124 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-01 22:11:56 +00:00
blueswir1 105a1f04b5 Fix y register loads and stores
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5123 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-01 19:35:29 +00:00
aurel32 c55497ecb8 SH4: Remove most uses of cpu_T[0] and cpu_T[1]
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5122 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-01 13:09:21 +00:00
aurel32 7efbe24165 SH4: TCG optimisations
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5121 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-01 13:09:14 +00:00
aurel32 69d6275b00 SH4: Convert remaining non-fp ops to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5120 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-01 13:09:06 +00:00
aurel32 c047da1af4 SH4: Convert shift functions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5119 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 22:37:17 +00:00
aurel32 390af82166 SH4: convert control/status register load/store to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5118 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 22:07:52 +00:00
aurel32 fa4da1074c SH4: Convert memory loads/stores to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5117 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 22:07:44 +00:00
aurel32 6f06939b68 SH4: convert some more arithmetics ops to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5116 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 13:55:14 +00:00
blueswir1 79383c9c08 Fix some warnings that would be generated by gcc -Wredundant-decls
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 09:51:20 +00:00
blueswir1 c8f9349ad9 Remove memcpy32() prototype leftover from r5109
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5114 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 09:22:10 +00:00
blueswir1 ed23fbd91c Add correct stack bias if a 64 bit stack is used
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5113 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 09:20:21 +00:00
aurel32 e6afc2f4b9 SH4: convert a few helpers to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5112 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 23:01:41 +00:00
aurel32 1000822b03 SH4: convert branch/jump instructions to TCG
(Shin-ichiro KAWASAKI)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5111 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 22:32:32 +00:00
blueswir1 ba6a9d8cda Fix FCC handling for Sparc64 target, initial patch by Vince Weaver
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5110 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 21:03:31 +00:00
blueswir1 91736d378b Fix Sparc64 boot on i386 host:
- move do_interrupt() back to op_helper.c
 - move non-helper prototypes from helper.h to exec.h
 - move some prototypes from cpu.h to exec.h
 - do not export either set_cwp() or cpu_set_cwp() from op_helper.c,
   but instead provide inline functions


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5109 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 20:50:21 +00:00
aurel32 a46256129e SH4: convert simple compare instructions to TCG
(Shin-ichiro KAWASAKI)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5108 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 20:12:18 +00:00
aurel32 3a8a44c4a8 SH4: convert a few control or system register functions to TCG
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5107 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-29 16:32:18 +00:00