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8 Commits

Author SHA1 Message Date
Richard Henderson 4cc16b3b92
target/riscv: Add checks for several RVC reserved operands 
C.ADDI16SP, C.LWSP, C.JR, C.ADDIW, C.LDSP all have reserved
operands that were not diagnosed.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
 2019-05-24 12:09:25 -07:00
Richard Henderson 0e68e240a9
target/riscv: Split RVC32 and RVC64 insns into separate files 
This eliminates all functions in insn_trans/trans_rvc.inc.c,
so the entire file can be removed.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
 2019-05-24 12:09:22 -07:00
Richard Henderson c2cfb97c01
target/riscv: Use pattern groups in insn16.decode 
This eliminates about half of the complicated decode
bits within insn_trans/trans_rvc.inc.c.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
 2019-05-24 12:09:22 -07:00
Richard Henderson 6cafec92f1
target/riscv: Merge argument decode for RVC shifti 
Special handling for IMM==0 is the only difference between
RVC shifti and RVI shifti.  This can be handled with !function.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
 2019-05-24 12:09:22 -07:00
Richard Henderson e1d455dd91
target/riscv: Merge argument sets for insn32 and insn16 
In some cases this allows us to directly use the insn32
translator function.  In some cases we still need a shim.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
 2019-05-24 12:09:22 -07:00
Bastian Koppelmann 97b0be81f6 target/riscv: Convert quadrant 2 of RVXC insns to decodetree 
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:40:46 +01:00
Bastian Koppelmann 07b001c6fc target/riscv: Convert quadrant 1 of RVXC insns to decodetree 
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:38:16 +01:00
Bastian Koppelmann e98d9140f2 target/riscv: Convert quadrant 0 of RVXC insns to decodetree 
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Peer Adelt <peer.adelt@hni.uni-paderborn.de>
 2019-03-13 10:34:06 +01:00