Commit Graph

20 Commits

Author SHA1 Message Date
Richard Henderson
88174019d2 target-cris: Use movcond and setcond
Signed-off-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-09-08 08:48:34 +02:00
Richard Henderson
42a268c241 tcg: Change translator-side labels to a pointer
This is improved type checking for the translators -- it's no longer
possible to accidentally swap arguments to the branch functions.

Note that the code generating backends still manipulate labels as int.

With notable exceptions, the scope of the change is just a few lines
for each target, so it's not worth building extra machinery to do this
change in per-target increments.

Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Leon Alrae <leon.alrae@imgtec.com>
Cc: Anthony Green <green@moxielogic.com>
Cc: Jia Liu <proljc@gmail.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Blue Swirl <blauwirbel@gmail.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-03-13 12:28:18 -07:00
Peter Maydell
08397c4b29 target-cris/translate.c: Remove t_gen_mov_TN_reg and t_gen_mov_reg_TN
Remove the t_gen_mov_TN_reg and t_gen_mov_reg_TN wrappers: the
latter is completely unused, and the former only used in a few
places (which are thus inconsistent with the rest of the decoder
which directly accesses cpu_R[]).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2014-06-09 01:04:44 +02:00
Andreas Färber
0dd106c5f0 target-cris: Replace DisasContext::env field with CRISCPU
This cleans up repeated cris_env_get_cpu() for cpu_abort().

Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:52:47 +01:00
Andreas Färber
a47dddd734 exec: Change cpu_abort() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13 19:52:28 +01:00
Andreas Färber
d1a94fec3d target-cris: Move TCG initialization to CRISCPU initfn
Split out TCG initialization from cpu_cris_init(). Avoid CPUCRISState
dependency for v10-specific initialization and for non-v10 by inlining
the decision into the initfn as well.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16 14:50:58 +01:00
Aurelien Jarno
cf7e0c80aa target-cris: Switch to AREG0 free mode
Add an explicit CPUCRISState parameter instead of relying on AREG0, and
use cpu_ld* in translation and interrupt handling. Remove AREG0 swapping
in tlb_fill(). Switch to AREG0 free mode

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-15 17:44:33 +00:00
Aurelien Jarno
febc9920c6 target-cris: Avoid AREG0 for helpers
Add an explicit CPUCRISState parameter instead of relying on AREG0.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-15 17:44:33 +00:00
Edgar E. Iglesias
f756c7a723 cris: Add break support for v10.
Still no retb

Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2012-06-14 15:29:11 +02:00
Andreas Färber
a1170bfd19 target-cris: Don't overuse CPUState
Scripted conversion:
  sed -i "s/CPUState/CPUCRISState/g" target-cris/*.[hc]
  sed -i "s/#define CPUCRISState/#define CPUState/" target-cris/cpu.h

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:25 +01:00
Stefan Sandstrom
774d5c5b16 cris: Handle conditional stores on CRISv10
Signed-off-by: Stefan Sandstrom <Stefan.Sandstrom@axis.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-12-12 11:38:31 +01:00
Edgar E. Iglesias
3ab20e206c cris: Handle opcode zero
It's a valid branch pc + 2.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-06-28 20:52:37 +02:00
Stefan Weil
8186e78311 Fix typo in comment (truely -> truly)
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-05-08 10:02:18 +01:00
Edgar E. Iglesias
5cabc5ccfe cris: Allow more TB chaining for crisv10
Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2011-01-10 23:24:36 +01:00
Blue Swirl
03e654c083 cris: avoid a write only variable
Compiling with GCC 4.6.0 20100925 produced a warning:
In file included from /src/qemu/target-cris/translate.c:3154:0:
/src/qemu/target-cris/translate_v10.c: In function 'dec10_prep_move_m':
/src/qemu/target-cris/translate_v10.c:111:22: error: variable 'rd' set but not used [-Werror=unused-but-set-variable]

Fix by deleting rd, adjust the only user.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-10-13 18:42:35 +00:00
Blue Swirl
43dc2a645e Replace assert(0) with abort() or cpu_abort()
When building with -DNDEBUG, assert(0) will not stop execution
so it must not be used for abnormal termination.

Use cpu_abort() when in CPU context, abort() otherwise.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-18 18:41:57 +00:00
Blue Swirl
70539e1850 Update to a hopefully more future proof FSF address
See also 8167ee8839,
530e7615ce and
fad6cb1a56.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-07 15:48:43 +00:00
Edgar E. Iglesias
4ffb9ae2e1 cris: Mask interrupts on dslots for CRISv10.
CRISv10 cores (unlike v32) do not take any interrupts while delayed
jumps are pending (delay slots).

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-02-20 19:17:29 +01:00
Edgar E. Iglesias
bf76bafa5a crisv10: Prettify.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-02-15 23:39:48 +01:00
Edgar E. Iglesias
40e9eddd38 cris: Add support for CRISv10 translation.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-02-15 12:18:57 +01:00