Commit Graph

94079 Commits

Author SHA1 Message Date
Peter Maydell 99c53410bc * Fix emulation of the SET CLOCK instruction
* Fix the s390x avocado test with Fedora
 * Update the s390x Travis jobs to Focal (instead of Bionic)
 * Implement the z15 Misc Instruction Extension 3 Facility
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Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-2022-02-28' into staging

* Fix emulation of the SET CLOCK instruction
* Fix the s390x avocado test with Fedora
* Update the s390x Travis jobs to Focal (instead of Bionic)
* Implement the z15 Misc Instruction Extension 3 Facility

# gpg: Signature made Mon 28 Feb 2022 10:34:47 GMT
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* remotes/thuth-gitlab/tags/pull-request-2022-02-28:
  tests/tcg/s390x: Tests for Miscellaneous-Instruction-Extensions Facility 3
  s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z15 GA1
  s390x/tcg: Implement Miscellaneous-Instruction-Extensions Facility 3 for the s390x
  travis.yml: Update the s390x jobs to Ubuntu Focal
  tests/avocado/machine_s390_ccw_virtio: Adapt test to new default resolution
  s390x: sck: load into a temporary not into in1

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-01 13:25:54 +00:00
Peter Maydell 648c15e4ec QAPI patches patches for 2022-02-28
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Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2022-02-28' into staging

QAPI patches patches for 2022-02-28

# gpg: Signature made Mon 28 Feb 2022 10:40:22 GMT
# gpg:                using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg:                issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg:                 aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867  4E5F 3870 B400 EB91 8653

* remotes/armbru/tags/pull-qapi-2022-02-28:
  qapi: Belatedly adjust limitations documentation
  rtc: Have event RTC_CHANGE identify the RTC by QOM path
  hw/rtc: Compile pl031 once-only
  qapi: Document some missing details of RTC_CHANGE event
  qapi: Move RTC_CHANGE back out of target schema
  qapi/migration: Fix examples document wrong field name for arguments
  qapi: Fix stale reference to scripts/qapi.py in a comment
  keyval: Fix grammar comment to cover downstream prefix
  scripts/qapi: minor delinting

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-03-01 10:43:36 +00:00
Richard Henderson 2ccf40f00e tcg/tci: Use tcg_out_ldst in tcg_out_st
The tcg_out_ldst helper will handle out-of-range offsets.
We haven't actually encountered any, since we haven't run
across the assert within tcg_out_op_rrs, but an out-of-range
offset would not be impossible in future.

Fixes: 6508988918 ("tcg/tci: Change encoding to uint32_t units")
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-28 08:04:10 -10:00
Luc Michel 5b7b197c87 accel/tcg/cpu-exec: Fix precise single-stepping after interrupt
In some cases, cpu->exit_request can be false after handling the
interrupt, leading to another TB being executed instead of returning
to the main loop.

Fix this by returning true unconditionally when in single-step mode.

Fixes: ba3c35d9c4 ("tcg/cpu-exec: precise single-stepping after an interrupt")
Signed-off-by: Luc Michel <lmichel@kalray.eu>
Message-Id: <20220214132656.11397-1-lmichel@kalray.eu>
[rth: Unlock iothread mutex; simplify indentation]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-28 08:04:06 -10:00
Richard Henderson 8929906e21 tcg: Remove dh_alias indirection for dh_typecode
The dh_alias redirect is intended to handle TCG types as distinguished
from C types.  TCG does not distinguish signed int from unsigned int,
because they are the same size.  However, we need to retain this
distinction for dh_typecode, lest we fail to extend abi types properly
for the host call parameters.

This bug was detected when running the 'arm' emulator on an s390
system. The s390 uses TCG_TARGET_EXTEND_ARGS which triggers code
in tcg_gen_callN to extend 32 bit values to 64 bits; the incorrect
sign data in the typemask for each argument caused the values to be
extended as unsigned values.

This simple program exhibits the problem:

	static volatile int num = -9;
	static volatile int den = -5;
	int main(void)
	{
		int quo = num / den;
		printf("num %d den %d quo %d\n", num, den, quo);
		exit(0);
	}

When run on the broken qemu, this results in:

	num -9 den -5 quo 0

The correct result is:

	num -9 den -5 quo 1

Fixes: 7319d83a73 ("tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/876
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reported-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
Tested-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
Tested-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-28 08:04:06 -10:00
Peter Maydell a8d39f5b5a aspeed queue:
* Removal of the swift-bmc machine
 * New Secure Boot Controller model
 * Improvements on the rainier machine
 * Various small cleanups
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Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20220227' into staging

aspeed queue:

* Removal of the swift-bmc machine
* New Secure Boot Controller model
* Improvements on the rainier machine
* Various small cleanups

# gpg: Signature made Sun 27 Feb 2022 08:45:45 GMT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* remotes/legoater/tags/pull-aspeed-20220227:
  aspeed/sdmc: Add trace events
  aspeed/smc: Add an address mask on segment registers
  aspeed: Introduce a create_pca9552() helper
  aspeed: rainier: Add strap values taken from hardware
  aspeed: rainier: Add i2c LED devices
  ast2600: Add Secure Boot Controller model
  arm: Remove swift-bmc machine

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-02-28 16:46:45 +00:00
Alex Bennée b904a9096f tests/tcg: port SYS_HEAPINFO to a system test
This allows us to check our new SYS_HEAPINFO implementation generates
sane values.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220225172021.3493923-19-alex.bennee@linaro.org>
2022-02-28 16:42:42 +00:00
Alex Bennée 5fc983af8b semihosting/arm-compat: replace heuristic for softmmu SYS_HEAPINFO
The previous numbers were a guess at best and rather arbitrary without
taking into account anything that might be loaded. Instead of using
guesses based on the state of registers implement a new function that:

 a) scans the MemoryRegions for the largest RAM block
 b) iterates through all "ROM" blobs looking for the biggest gap

The "ROM" blobs include all code loaded via -kernel and the various
-device loader techniques.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Andrew Strauss <astrauss11@gmail.com>
Cc: Keith Packard <keithp@keithp.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220225172021.3493923-18-alex.bennee@linaro.org>
2022-02-28 16:42:35 +00:00
Alex Bennée 04e90c1313 tests/tcg: completely disable threadcount for sh4
The previous disabling of threadcount 3bdc19af00 ("tests/tcg/sh4:
disable another unreliable test") just for plugins was being too
conservative. It's all broken so skip it.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-17-alex.bennee@linaro.org>
2022-02-28 16:42:35 +00:00
Alex Bennée 7dc17ff794 gitlab: upgrade the job definition for s390x to 20.04
The new s390x machine has more of everything including the OS. As
18.04 will soon be going we might as well get onto something moderately
modern.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Acked-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-16-alex.bennee@linaro.org>
2022-02-28 16:42:35 +00:00
Thomas Huth da420d3d1d travis.yml: Update the s390x jobs to Ubuntu Focal
QEMU will soon drop the support for Ubuntu 18.04, so let's update
the Travis jobs that were still using this version to 20.04 instead.

While we're at it, also remove an obsolete comment about Ubuntu
Xenial being the default for our Travis jobs.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220221153423.1028465-1-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-15-alex.bennee@linaro.org>
2022-02-28 16:42:35 +00:00
Alex Bennée f8a4c6d728 tests/tcg: add vectorised sha512 versions
This builds vectorised versions of sha512 to exercise the vector code:

  - aarch64 (AdvSimd)
  - i386 (SSE)
  - s390x (MVX)
  - ppc64/ppc64le (power10 vectors)

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-14-alex.bennee@linaro.org>
2022-02-28 16:42:35 +00:00
Alex Bennée d426f4fc6f tests/tcg: add sha512 test
This imports the sha512 algorithm and related tests from ccan which
offers a cleaner hash implementation with its own validation tests
with which we can exercise TCG code generations.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-13-alex.bennee@linaro.org>
2022-02-28 16:42:30 +00:00
Alex Bennée c96e593a7e tests/tcg: build sha1-vector with O3 and compare
The aim of this is to test code generation for vectorised operations.
Unfortunately gcc struggles to do much with the messy sha1 code (try
-fopt-info-vec-missed to see why). However it's better than nothing.

We assume the non-vectorised output is gold and baring compiler bugs
the outputs should match.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-12-alex.bennee@linaro.org>
2022-02-28 16:42:25 +00:00
Alex Bennée 93f44896c9 tests/tcg/ppc64: clean-up handling of byte-reverse
Rather than having an else leg for the missing compiler case we can
simply just not add the test - the same way as is done for ppc64le.
Also while we are at it fix up the compiler invocation.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-11-alex.bennee@linaro.org>
2022-02-28 16:42:25 +00:00
Alex Bennée cc44a16002 gitlab: add a new aarch32 custom runner definition
Although running on aarch64 hardware we can still target 32bit builds
with a cross compiler and run the resulting binaries.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220225172021.3493923-10-alex.bennee@linaro.org>
2022-02-28 16:42:12 +00:00
Alex Bennée 9c3b522455 scripts/ci: allow for a secondary runner
Some HW can run multiple architecture profiles so we can install a
secondary runner to build and run tests for those profiles. This
allows setting up secondary service.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-9-alex.bennee@linaro.org>
2022-02-28 16:42:12 +00:00
Alex Bennée 93c9aeede6 scripts/ci: add build env rules for aarch32 on aarch64
At least the current crop of Aarch64 HW can support running 32 bit EL0
code. Before we can build and test we need a minimal set of packages
installed. We can't use "apt build-dep" because it currently gets
confused trying to keep two sets of build-deps installed at once.
Instead we install a minimal set of libraries that will allow us to
continue.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-8-alex.bennee@linaro.org>
2022-02-28 16:42:07 +00:00
Alex Bennée 7d5817a426 tests/docker: introduce debian-riscv64-test-cross
Cross building QEMU for riscv64 still involves messing about with sid
and ports. However for building tests we can have a slimmer compiler
only container which should be more stable.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-7-alex.bennee@linaro.org>
2022-02-28 16:42:02 +00:00
Alex Bennée 89767579ca tests/docker: update debian-s390x-cross with lcitool
A later compiler is needed for some upcomming tests so we might as
well migrate to an lcitool generated docker file.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: David Hildenbrand <david@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-6-alex.bennee@linaro.org>
2022-02-28 16:42:02 +00:00
Alex Bennée e3000245a0 tests/docker: update debian-arm64-cross with lcitool
Using lcitool update debian-arm64-cross to a Debian 11 based system.
As a result we can drop debian-arm64-test-cross just for building
tests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-5-alex.bennee@linaro.org>
2022-02-28 16:42:02 +00:00
Alex Bennée 072f143073 tests/lcitool: update to latest version
We will need an update shortly for some new images.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220225172021.3493923-4-alex.bennee@linaro.org>
2022-02-28 16:41:57 +00:00
Alex Bennée 5dbefb87aa tests/docker: add NOUSER for alpine image
The alpine image doesn't have a standard useradd binary so disable
this convenience feature for it.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-3-alex.bennee@linaro.org>
2022-02-28 16:41:53 +00:00
Alex Bennée be20302ae8 tests/docker: restore TESTS/IMAGES filtering
This was broken in the re-factor:

  e86c9a64f4 ("tests/docker/Makefile.include: add a generic docker-run target")

Rather than unwind the changes just apply the filters to the total set
of available images and tests. That way we don't inadvertently build
images only not to use them later.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reported-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220225172021.3493923-2-alex.bennee@linaro.org>
2022-02-28 16:41:44 +00:00
Peter Maydell 00483d3869 OpenRISC patches
- Add automatic DTS generation to openrisc_sim
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Merge remote-tracking branch 'remotes/shorne/tags/or1k-pull-request' into staging

OpenRISC patches

 - Add automatic DTS generation to openrisc_sim

# gpg: Signature made Sat 26 Feb 2022 01:39:55 GMT
# gpg:                using RSA key D9C47354AEF86C103A25EFF1C3B31C2D5E6627E4
# gpg: Good signature from "Stafford Horne <shorne@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: D9C4 7354 AEF8 6C10 3A25  EFF1 C3B3 1C2D 5E66 27E4

* remotes/shorne/tags/or1k-pull-request:
  hw/openrisc/openrisc_sim: Add support for initrd loading
  hw/openrisc/openrisc_sim: Add automatic device tree generation
  hw/openrisc/openrisc_sim: Increase max_cpus to 4
  hw/openrisc/openrisc_sim: Use IRQ splitter when connecting UART
  hw/openrisc/openrisc_sim: Parameterize initialization
  hw/openrisc/openrisc_sim: Create machine state for or1ksim

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-02-28 11:27:16 +00:00
Markus Armbruster 1428502c8c qapi: Belatedly adjust limitations documentation
Commit 57df0dff1a "qapi: Extend -compat to set policy for unstable
interfaces" (v6.2.0) took care of covering experimental features, but
neglected to adjust a comment suggesting to cover it.  Adjust it now.

Fixes: 57df0dff1a
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20220225084538.218876-1-armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-02-28 11:39:35 +01:00
Markus Armbruster 2beb1e5f9a rtc: Have event RTC_CHANGE identify the RTC by QOM path
Event RTC_CHANGE is "emitted when the guest changes the RTC time" (and
the RTC supports the event).  What if there's more than one RTC?
Which one changed?  New @qom-path identifies it.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <87a6ejnm80.fsf@pond.sub.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-02-28 11:39:35 +01:00
Peter Maydell 03397528d9 hw/rtc: Compile pl031 once-only
Now that the RTC_CHANGE event is no longer target-specific,
we can move the pl031 back to a compile-once source file
rather than a compile-per-target one.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220221192123.749970-4-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2022-02-28 11:39:35 +01:00
Peter Maydell e67e3a48c0 qapi: Document some missing details of RTC_CHANGE event
The RTC_CHANGE event's documentation is missing some details:
 * the offset argument is in units of seconds
 * it isn't guaranteed that the RTC will implement the event

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20220221192123.749970-3-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2022-02-28 11:39:35 +01:00
Peter Maydell 1f216b8ca9 qapi: Move RTC_CHANGE back out of target schema
This commit effectively reverts commit 183e4281a3, which moved
the RTC_CHANGE event to the target schema.  That change was an
attempt to make the event target-specific to improve introspection,
but the event isn't really target-specific: it's machine or device
specific.  Putting RTC_CHANGE in the target schema with an ifdef list
reduces maintainability (by adding an if: list with a long list of
targets that needs to be manually updated as architectures are added
or removed or as new devices gain the RTC_CHANGE functionality) and
increases compile time (by preventing RTC devices which emit the
event from being "compile once" rather than "compile once per
target", because qapi-events-misc-target.h uses TARGET_* ifdefs,
which are poisoned in "compile once" files.)

Move RTC_CHANGE back to misc.json.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Greg Kurz <groug@kaod.org>
Message-Id: <20220221192123.749970-2-peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2022-02-28 11:39:35 +01:00
Fabian Holler b1ca53224a qapi/migration: Fix examples document wrong field name for arguments
The examples for the snapshot-* and calc-dirty-rate commands document
that arguments for the commands are passed in a 'data' field.
This is wrong, passing them in a "data" field results in
the error:
  {"error": {"class": "GenericError", "desc": "QMP input member 'data'
		       is unexpected"}}
Arguments are expected to be passed in an field called "arguments".

Replace "data" with "arguments" in the snapshot-* and calc-dirty-rate
command examples.

Signed-off-by: Fabian Holler <fabian.holler@simplesurance.de>
Message-Id: <20220222170116.63105-1-fabian.holler@simplesurance.de>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2022-02-28 11:39:35 +01:00
Markus Armbruster 429d79e6be qapi: Fix stale reference to scripts/qapi.py in a comment
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20220218145551.892787-3-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-02-28 11:39:35 +01:00
Markus Armbruster bbe0342b2a keyval: Fix grammar comment to cover downstream prefix
According to the grammar, a key __com.redhat_foo would be parsed as
two key fragments __com and redhat_foo.  It's actually parsed as a
single fragment.  Fix the grammar.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20220218145551.892787-2-armbru@redhat.com>
2022-02-28 11:39:35 +01:00
John Snow 90254ec46d scripts/qapi: minor delinting
Get isort and pylint tools passing again.

Signed-off-by: John Snow <jsnow@redhat.com>
Message-Id: <20220211183650.2946895-1-jsnow@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
[Comment explaining good-names-rgxs tweaked]
Signed-off-by: Markus Armbruster <armbru@redhat.com>
2022-02-28 11:39:35 +01:00
David Miller e2c3fb0699 tests/tcg/s390x: Tests for Miscellaneous-Instruction-Extensions Facility 3
tests/tcg/s390x/mie3-compl.c: [N]*K instructions
tests/tcg/s390x/mie3-mvcrl.c: MVCRL instruction
tests/tcg/s390x/mie3-sel.c: SELECT instruction

Signed-off-by: David Miller <dmiller423@gmail.com>
Message-Id: <20220223223117.66660-4-dmiller423@gmail.com>
[thuth: Squash mnemonic -> .insn patch, white space cleanup, improve asm usage]
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-28 11:29:15 +01:00
David Miller 8a4eafb69c s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z15 GA1
TCG implements everything we need to run basic z15 OS+software

Signed-off-by: David Miller <dmiller423@gmail.com>
Message-Id: <20220223223117.66660-3-dmiller423@gmail.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-28 11:29:15 +01:00
David Miller ea0a1053e2 s390x/tcg: Implement Miscellaneous-Instruction-Extensions Facility 3 for the s390x
implements:
AND WITH COMPLEMENT   (NCRK, NCGRK)
NAND                  (NNRK, NNGRK)
NOT EXCLUSIVE OR      (NXRK, NXGRK)
NOR                   (NORK, NOGRK)
OR WITH COMPLEMENT    (OCRK, OCGRK)
SELECT                (SELR, SELGR)
SELECT HIGH           (SELFHR)
MOVE RIGHT TO LEFT    (MVCRL)
POPULATION COUNT      (POPCNT)

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/737
Signed-off-by: David Miller <dmiller423@gmail.com>
Message-Id: <20220223223117.66660-2-dmiller423@gmail.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-28 11:29:15 +01:00
Thomas Huth e7b3b0951d travis.yml: Update the s390x jobs to Ubuntu Focal
QEMU will soon drop the support for Ubuntu 18.04, so let's update
the Travis jobs that were still using this version to 20.04 instead.

While we're at it, also remove an obsolete comment about Ubuntu
Xenial being the default for our Travis jobs.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220221153423.1028465-1-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-02-28 11:29:03 +01:00
Warner Losh a5b8816636 bsd-user: Add safe system call macros
Add a series of macros to create system call macros that go via the
safe_syscall path.

Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-26 21:05:21 -07:00
Warner Losh 0ff0508286 bsd-user: Define target_arg64
target_arg64 is a generic way to extract 64-bits from a pair of
arguments. On 32-bit platforms, it returns them joined together as
appropriate. On 64-bit platforms, it returns the first arg because it's
already 64-bits.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-26 21:05:21 -07:00
Warner Losh 647afdf183 bsd-user: introduce target.h
Create target.h. This file is intended to be simple and describe basic
things about the architecture. If something is a basic feature of the
architecture, it belongs here. Should we need something that's per-BSD
there will be a target-os.h that will live in the per-bsd directories.

Define regpairs_aligned to reflect whether or not registers are 'paired'
for 64-bit arguments or not. This will be false for all 64-bit targets,
and will be true on those architectures that pair (currently just armv7
and powerpc on FreeBSD 14.x).

Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-26 21:05:21 -07:00
Warner Losh c5c84d1651 bsd-user/bsd-file.h: Implementation details for the filesystem calls
An include file that pulls in all the definitions needed for the file
related system calls. This also includes the host definitions to
implement the system calls and some helper routines to lock/unlock
different aspects of the system call arguments.

Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-26 21:05:18 -07:00
Cédric Le Goater 3671342a38 aspeed/sdmc: Add trace events
This is useful to analyze changes in the U-Boot RAM driver when SDRAM
training is performed.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-02-26 18:40:51 +01:00
Cédric Le Goater 7c8d2fc4f9 aspeed/smc: Add an address mask on segment registers
Only a limited set of bits are used for decoding the Start and End
addresses of the mapping window of a flash device.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-02-26 18:40:51 +01:00
Cédric Le Goater f4aec2523b aspeed: Introduce a create_pca9552() helper
This unifies the way we create the pca9552 devices on the different boards.

Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-02-26 18:40:51 +01:00
Joel Stanley b6d1df6482 aspeed: rainier: Add strap values taken from hardware
When time permits, we should introduce defines for the HW strapping
registers to cleanly decode the values.

SCU500 = 0x00422016
  Disable ARM JTAG trusted world debug: 0x1
  Disable ARM JTAG debug: 0x1
  VGA Memory Size: 0x1 [16MB]
  Cortex M3: 0x1 [Disabled]
  Boot device: 0x1 [eMMC]
  Reserved: 0x1

SCU510 = 0x80000848
  Secure Boot Enable: 0x1
  Enable boot SPI or eMMC ABR (second boot): 0x1
  Enable LPC mode: 0x1 [LPC]
  Disable LPC SuperIO 0x2e/0x4e: 0x1

Signed-off-by: Joel Stanley <joel@jms.id.au>
[ clg: rewrote the commit log ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-02-26 18:40:51 +01:00
Joel Stanley bcb122f8bb aspeed: rainier: Add i2c LED devices
This helps quieten booting the current Rainier kernel.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-02-26 18:40:51 +01:00
Joel Stanley e1acf581c9 ast2600: Add Secure Boot Controller model
Just a stub that indicates the system has booted in secure boot mode.
Used for testing the driver:

 https://lore.kernel.org/all/20211019080608.283324-1-joel@jms.id.au/

Signed-off-by: Joel Stanley <joel@jms.id.au>
[ clg: - Fixed typo
       - Adjusted Copyright dates ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-02-26 18:40:51 +01:00
Joel Stanley 50f97a0ec6 arm: Remove swift-bmc machine
It was scheduled for removal in 7.0.

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-02-26 18:40:51 +01:00
Warner Losh deeff83b47 bsd-user/freebsd/os-syscall.c: Add get_errno and host_to_target_errno
Add the helper functions get_errno and host_to_target_errno. get_errno
returns either the system call results, or the -errno when system call
indicates failure by returning -1. Host_to_target_errno returns errno
(since on FreeBSD they are the same on all architectures) along with a
comment about why it's the identity.

Signed-off-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Kyle Evans <kevans@FreeBSD.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-02-26 10:01:38 -07:00