OpenE2K/qemu-e2k
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167 Commits

Author SHA1 Message Date
malc
828808f5ec Fix alignment problem with some 64bit load/store instructions 
LD/STD/LWA require displacement to be multiple of 4, provide
tcg_out_ldsta which checks the supplied displacement and falls
back on indexed variant when the check fails. All uses of
LD/STD/LWA outside of tcg_out_ldst appear to be safe.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5670 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 03:04:57 +00:00
pbrook
0c5f3c8d7d Mention output overlaps. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5619 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-04 13:17:17 +00:00
pbrook
de3526b2b3 Fix rotri_i64 typo. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5609 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-03 13:30:50 +00:00
aurel32
158245714e tcg-ops.h: add rotl/rotli and rotr/rotri TCG instructions 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5607 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-03 07:08:36 +00:00
aurel32
f02bb954a5 tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targets 
Use the same order as the _i32 version (pure code move). Suggested by
Laurent Laurent Desnogues.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5606 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-03 07:08:26 +00:00
pbrook
10460c8ac4 64-bit target subfi fix. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5602 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-02 13:26:16 +00:00
aurel32
0045734ab7 tcg-ops.h: add a subfi wrapper 
Add a subfi (subtract from immediate) wrapper, useful for the PPC target.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5599 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-02 08:23:04 +00:00
aurel32
6359706f93 tcg-ops.h: _i64 TCG immediate instructions cleanup 
Move addi_i64, muli_i64 and subi_i64 out of #if TCG_TARGET_REG_BITS
as both implementations are strictly identical. Use the same
optimisation (ie when imm == 0) for addi_i64 and subi_64 than the
32-bit version.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5598 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-02 08:22:54 +00:00
blueswir1
b1d8e52e63 Fix undeclared symbol warnings from sparse 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-26 13:43:07 +00:00
aurel32
bdffd4a9d7 TCG: add tcg_const_local_tl() 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5504 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-21 11:30:45 +00:00
aurel32
f24cb33e5e TCG: add logical operations found on alpha and powerpc processors 
- andc_i32/i64 t0, t1, t2
- eqv_i32/i64 t0, t1, t2
- nand_i32/i64 t0, t1, t2
- nor_i32/i64 t0, t1, t2
- orc_i32/i64 t0, t1, t2

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5501 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-21 11:28:59 +00:00
blueswir1
d4a9eb1fc6 Add some missing static and const qualifiers, reg_names only used if NDEBUG set 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5421 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-05 09:59:14 +00:00
malc
3ee1b8550c Optimize 64 bit bswap 
Use rldimi instead of rldicr/or pair, saves us one instruction.
Suggested by Hollis Blanchard.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5404 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-02 20:02:31 +00:00
pbrook
88422e2ebd Fix tcg_gen_concat32_i64 on 64-bit hosts. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5306 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-23 22:31:10 +00:00
malc
f8edcbaa2d Avoid clobbering input register in qemu_ld64+bswap+useronly case 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5287 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-22 01:08:08 +00:00
blueswir1
945ca823b9 Add concat32_i64 and concat_tl_i64 ops 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5282 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-21 18:32:28 +00:00
pbrook
36aa55dcd9 Add concat_i32_i64 op. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-21 13:48:32 +00:00
blueswir1
f48f3ede71 Display TCGCond name in tcg dumper (original patch by Tristan Gingold) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5208 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-14 07:45:17 +00:00
blueswir1
9d0efc88e4 Use 64 bit loads for tlb addend only if addend size is 64 bits 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5203 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-13 20:07:53 +00:00
blueswir1
baf8cc5275 Fix stack alignment on Sparc32 host 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5202 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-13 20:05:32 +00:00
pbrook
733fef0e40 TCG: Use x86-64 zero extension instructions. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5180 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-07 18:07:39 +00:00
pbrook
b6d17150af Implement TCG sign extension ops for x86-64. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5179 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-07 17:45:15 +00:00
aurel32
00dbbb03b6 Revert "TCG: enable debug" 
This reverts commit 5166, commited by error.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5169 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-05 14:22:24 +00:00
aurel32
b24a39fab0 TCG: enable debug 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5166 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-05 14:19:35 +00:00
blueswir1
79383c9c08 Fix some warnings that would be generated by gcc -Wredundant-decls 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-30 09:51:20 +00:00
malc
70fa887c14 Relax qemu_ld/st constraints for !SOFTMMU case 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5038 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-21 01:14:07 +00:00
malc
735ee40d92 Relax qemu_ld/st constraints for !SOFTMMU case 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5034 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-20 22:39:22 +00:00
malc
109719ec9e Avoid clobbering input/aliased registers in !SOFTMMU+64bit+bswap case 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5033 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-20 22:39:19 +00:00
malc
0b7c1d897f Clear the upper 32 bits of addr_reg in TARGET_LONG_BITS == 32 case 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5032 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-20 22:39:17 +00:00
malc
a2a546b3fc Move tcg_out_tlb_read into #ifdef CONFIG_SOFTMMU block to avoid compiler warning 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5031 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-20 22:39:14 +00:00
blueswir1
8fcd36920e Fix some warnings that would be generated by gcc -Wmissing-prototypes 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5022 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-17 20:26:25 +00:00
blueswir1
6f41b7772d Fix 64 bit constant generation 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5020 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-17 20:14:16 +00:00
blueswir1
90cbed4656 Fix 32 bit address overflow 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5019 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-17 16:13:02 +00:00
blueswir1
bffe143153 Restore AREG0 after calls 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5018 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-17 14:34:27 +00:00
blueswir1
56fc64dfd0 Sparc code generator update (fix qemu_ld & qemu_st) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5014 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-16 19:54:01 +00:00
blueswir1
53c3748794 Sparc code generator update 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5009 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-15 18:14:44 +00:00
malc
bf6bca527c Account for MacOS X ABI reserved space in linkage area (Andreas Faerber) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4985 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-03 19:04:11 +00:00
malc
f9bf298717 Preliminary MacOS X on PPC32 support 
Big thanks to BlueSwirl for Sparc failure analysis.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4984 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-03 19:04:07 +00:00
malc
52781543ad On ppc32 make tb_set_jmp_target1 behave like it does on a ppc64 
Avoids nasty warnings about flush_icache_range from gcc4 and inability
to compile [cpu-]exec.c with gcc3 and -O, also the function is much
too large to be candidate for inlining anyway.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4974 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-29 20:08:17 +00:00
malc
fe6f943f3b Immediate versions of some operations 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4962 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-28 23:46:06 +00:00
malc
000a2d866a Do not try handle "special" arguments of and/or/xor/shl/shr, upper level does it 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4961 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-28 23:46:03 +00:00
malc
e924bbec7a Set the L field of CMP[L][I] when dealing with 64 bit quantities 
This (along with previous 2 commits) makes X86_64 work on ppc64 too.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4960 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-28 19:42:23 +00:00
malc
880e52b8b0 Fix preprocessor guard condition 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4959 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-28 19:42:20 +00:00
malc
95153fde07 Remove leftover from previous way to load 64 bit constants 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4958 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-28 19:42:17 +00:00
malc
4a40e23194 Special-case some paths inside tcg_out_tlb_read 
a. Use 32bit arithmetics in TARGET_LONG_BITS == 32 case
b. Optimize byte access case in TARGET_LONG_BITS == 64 case

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4955 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-27 11:09:21 +00:00
malc
301f6d903a Fix the opcode value of LWA 
That should teach one to not blindly trust documentation that will
(out of the blue) use decimal and binary representation for numbers in
the same chart for no apparent reason and without any prefixes, sigh..

Unbreaks MIPS.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4954 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-27 10:28:15 +00:00
blueswir1
e97b640d47 Try to avoid glibc global register mangling, again 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4953 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-26 17:19:35 +00:00
malc
c070355d39 Relax memory operations constraints 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4950 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-26 11:21:03 +00:00
malc
b01d9fea6c Fix qemu_ld64 constraint list 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4949 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-26 11:21:00 +00:00
malc
e03ae7f9b3 Use proper offset for LR save slot 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4948 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-26 11:20:57 +00:00