OpenE2K/qemu-e2k
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Commit Graph

133 Commits

Author SHA1 Message Date
ths
171b31e7c7 Don't use T2 for INS, it conflicts with branch delay slot handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2674 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-15 21:26:37 +00:00
ths
80c27194a7 Fix qemu SIGFPE caused by division-by-zero due to underflow. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2673 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-15 21:21:33 +00:00
ths
a85427b147 Small code generation optimization. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2672 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-15 19:52:12 +00:00
ths
fff739ccd5 Delete unused define. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2671 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-15 17:27:07 +00:00
ths
16c00cb2c2 Restart interrupts after an exception. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2664 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-14 12:56:46 +00:00
ths
744e091596 Nicer Log formatting. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2659 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-13 22:30:36 +00:00
ths
e58c8ba5f6 Another fix for CP0 Cause register handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2658 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-13 20:17:54 +00:00
ths
2f6445458e Make SYNCI_Step and CCRes CPU-specific. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2651 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 20:34:23 +00:00
ths
b48cfdffd9 Throw RI for invalid MFMC0-class instructions. Introduce optional 
MIPS_STRICT_STANDARD define to adhere more to the spec than it makes
sense in normal operation.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2650 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 02:24:14 +00:00
ths
2423f6601a Code formatting fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2649 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 02:15:08 +00:00
ths
534ce69ff0 More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may 
end up empty for 32bit mips, which dyngen trips over.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2648 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-11 02:13:00 +00:00
ths
c090a8f440 Fix CP0_IntCtl handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2645 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:17:31 +00:00
ths
c50da3df61 Proper handling of reserved bits in the context register. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2644 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:16:30 +00:00
ths
4e7a4a4e84 Mark watchpoint features as unimplemented. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2643 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:15:41 +00:00
ths
62c5609aa5 Catch unaligned sc/scd. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2642 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:14:21 +00:00
ths
97428a4d84 Fix exception handling cornercase for rdhwr. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2641 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 14:13:40 +00:00
ths
dac9321024 Remove bogus mtc0 handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2640 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-09 12:31:31 +00:00
pbrook
d537cf6c86 Unify IRQ handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 18:14:41 +00:00
j_mayer
9b3c35e0e6 cpu_get_phys_page_debug should return target_phys_addr_t 
instead of target_ulong to be consistent.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 11:21:28 +00:00
ths
e0c84da78c Implement prefx. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2630 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:11:39 +00:00
ths
cbeb0857da Set proper BadVAddress value for unaligned instruction fetch. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2629 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:11:15 +00:00
ths
e04bcc691b Actually skip over delay slot for a non-taken branch likely. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2628 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:10:22 +00:00
ths
f757d6ff29 Fix ins/ext cornercase. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2627 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-07 01:09:17 +00:00
ths
beb811bdd6 Fix handling of ADES exceptions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2623 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 19:31:06 +00:00
ths
f41c52f170 Save state for all CP0 instructions, they may throw a CPU exception. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2622 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-06 18:46:01 +00:00
ths
c53f4a62e3 fix branch delay slot cornercases. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2615 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:21:37 +00:00
ths
5a63bcb2d2 Fix rotr immediate ops, mask shift/rotate arguments to their allowed 
size.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2614 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:20:05 +00:00
ths
acd858d91f Handle EBase properly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2613 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:18:13 +00:00
ths
1579a72ec5 Fix RDHWR handling. Code formatting. Don't use *_direct versions to raise 
exceptions.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2611 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:16:25 +00:00
ths
f7cfb2a176 64bit MIPS FPUs have 32 registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2610 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-05 23:14:23 +00:00
ths
876d4b0783 Fix code formatting. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2595 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-04 21:07:17 +00:00
ths
38121543c7 MIPS32R2 needs RDPGPR/WRPGPR instructions even when no shadow registers 
are implemented.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2589 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-02 17:28:07 +00:00
ths
2d0e944d1c Build fix for 64bit machines. (This is still not correct mul/div handling.) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2587 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-02 15:54:05 +00:00
ths
60aa19abef Actually enable 64bit configuration. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-01 12:36:18 +00:00
ths
fbe4f65b28 MIPS64 configurations. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2564 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-04-01 11:16:48 +00:00
ths
a4bc3afc09 Malta CBUS UART support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2557 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-31 16:54:14 +00:00
ths
7246bb21ba Update mips TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2549 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-30 18:56:19 +00:00
ths
36bb244bd3 Fix typo, suggested by Ben Taylor. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2548 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-30 18:42:21 +00:00
ths
5efbfeddac Squash logic bugs while they are fresh... 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2547 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-30 17:48:00 +00:00
ths
24c7b0e330 Sanitize mips exception handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2546 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-30 16:44:54 +00:00
ths
34ee2edebb One more bit of mips CPU configuration, and support for early 4KEc 
which implemented only MIPS32R1. Thanks to Stefan Weil to insist he's
right on that. :-)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2533 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-24 23:36:18 +00:00
ths
e397ee3382 Fix enough FPU/R2 support to get 24Kf going. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2528 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-23 00:43:28 +00:00
ths
3953d78687 Move mips CPU specific initialization to translate_init.c. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2522 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-21 11:04:42 +00:00
ths
3ad4bb2d3d Barf on branches/jumps in branch delay slots. Spotted by Stefan Weil. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2513 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-19 22:15:30 +00:00
ths
820e00f252 Define gen_intermediate_code_internal as "static inline". 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2512 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-19 21:46:06 +00:00
ths
8294eba187 SPARC host fixes, by Ben Taylor. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2503 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-19 14:47:40 +00:00
ths
39d51eb8bc Fix BD flag handling, cause register contents, implement some more bits 
for R2 interrupt handling.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2493 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-18 12:43:40 +00:00
ths
33d68b5f00 MIPS -cpu selection support, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-18 00:30:29 +00:00
ths
60a9f9ecd9 Note FPU enable/disable issue. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2489 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-17 15:39:48 +00:00
ths
6f5b89a07c MIPS Userland TLS register emulation, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2465 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-03-02 20:48:00 +00:00