ths
fbcc68286a
Implement FP madd/msub, wire up bc1any[24][ft].
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2802 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11 09:59:10 +00:00
ths
923617a396
Improved debug output for the MIPS opcode decoder.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2801 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11 00:16:06 +00:00
ths
4759513bd9
Fix missing status ro mask initialization, thanks Stefan Weil.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2800 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-11 00:02:14 +00:00
ths
beebb570f4
Fix for the scd instruction, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2799 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-10 00:51:01 +00:00
ths
b4ab4b4e1b
Preliminary MIPS 64-bit MMU implementation, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2794 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-09 09:34:30 +00:00
ths
a6763a5881
Fix MIPS64 address computation specialcase, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2793 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-09 09:33:33 +00:00
ths
09c69c5b23
Work around gcc's mips define, spotted by Stefan Weil.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2786 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-08 20:51:26 +00:00
ths
5a5012ecbd
MIPS 64-bit FPU support, plus some collateral bugfixes in the
...
conditional branch handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2779 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-07 13:55:33 +00:00
ths
8b4af70527
Update TODO.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2778 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-07 12:52:18 +00:00
ths
0a6de75002
Clear BD slot on next exception if appropriate.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2777 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-07 12:46:25 +00:00
ths
9aca99a06d
Fix a really stupid bug in the [ls]d[lr] emulation, by Herve Poussineau.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2773 c046a42c-6fe2-441c-8c8c-71466251a162
2007-05-05 20:13:13 +00:00
ths
01179c382b
Kill broken host register definitions, thanks to Paul Brook and Herve
...
Poussineau for debugging this.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2747 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 21:26:37 +00:00
ths
c631c88cee
Revert last checkin.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2746 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 21:19:03 +00:00
ths
bc8191fce9
Hopefully the final fix for LUI sign extensions.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2745 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-29 20:13:19 +00:00
ths
509b8ab2cc
Update TODO.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2739 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-28 21:44:04 +00:00
ths
d6929309b6
Next attempt to get the lui sign extension right.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2727 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-25 16:41:11 +00:00
ths
7bc45061ee
Fix lui sign extension.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2726 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-25 13:58:52 +00:00
ths
19221bdaf8
Update comment. We can't easily adhere to the architecture spec because
...
it would involve counting the actually executed instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2708 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-19 16:35:09 +00:00
ths
fcb4a419f5
Choose number of TLBs at runtime, by Herve Poussineau.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-17 15:26:47 +00:00
ths
9898128f55
Simplify branch likely handling.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2676 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-16 01:35:29 +00:00
ths
171b31e7c7
Don't use T2 for INS, it conflicts with branch delay slot handling.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-15 21:26:37 +00:00
ths
80c27194a7
Fix qemu SIGFPE caused by division-by-zero due to underflow.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2673 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-15 21:21:33 +00:00
ths
a85427b147
Small code generation optimization.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2672 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-15 19:52:12 +00:00
ths
fff739ccd5
Delete unused define.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2671 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-15 17:27:07 +00:00
ths
16c00cb2c2
Restart interrupts after an exception.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2664 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-14 12:56:46 +00:00
ths
744e091596
Nicer Log formatting.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2659 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-13 22:30:36 +00:00
ths
e58c8ba5f6
Another fix for CP0 Cause register handling.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2658 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-13 20:17:54 +00:00
ths
2f6445458e
Make SYNCI_Step and CCRes CPU-specific.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2651 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-11 20:34:23 +00:00
ths
b48cfdffd9
Throw RI for invalid MFMC0-class instructions. Introduce optional
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MIPS_STRICT_STANDARD define to adhere more to the spec than it makes
sense in normal operation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2650 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-11 02:24:14 +00:00
ths
2423f6601a
Code formatting fix.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2649 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-11 02:15:08 +00:00
ths
534ce69ff0
More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may
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end up empty for 32bit mips, which dyngen trips over.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2648 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-11 02:13:00 +00:00
ths
c090a8f440
Fix CP0_IntCtl handling.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2645 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 14:17:31 +00:00
ths
c50da3df61
Proper handling of reserved bits in the context register.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2644 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 14:16:30 +00:00
ths
4e7a4a4e84
Mark watchpoint features as unimplemented.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2643 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 14:15:41 +00:00
ths
62c5609aa5
Catch unaligned sc/scd.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2642 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 14:14:21 +00:00
ths
97428a4d84
Fix exception handling cornercase for rdhwr.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2641 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 14:13:40 +00:00
ths
dac9321024
Remove bogus mtc0 handling.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2640 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-09 12:31:31 +00:00
pbrook
d537cf6c86
Unify IRQ handling.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 18:14:41 +00:00
j_mayer
9b3c35e0e6
cpu_get_phys_page_debug should return target_phys_addr_t
...
instead of target_ulong to be consistent.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2633 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 11:21:28 +00:00
ths
e0c84da78c
Implement prefx.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2630 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 01:11:39 +00:00
ths
cbeb0857da
Set proper BadVAddress value for unaligned instruction fetch.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2629 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 01:11:15 +00:00
ths
e04bcc691b
Actually skip over delay slot for a non-taken branch likely.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2628 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 01:10:22 +00:00
ths
f757d6ff29
Fix ins/ext cornercase.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2627 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07 01:09:17 +00:00
ths
beb811bdd6
Fix handling of ADES exceptions.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2623 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-06 19:31:06 +00:00
ths
f41c52f170
Save state for all CP0 instructions, they may throw a CPU exception.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2622 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-06 18:46:01 +00:00
ths
c53f4a62e3
fix branch delay slot cornercases.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2615 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 23:21:37 +00:00
ths
5a63bcb2d2
Fix rotr immediate ops, mask shift/rotate arguments to their allowed
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size.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2614 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 23:20:05 +00:00
ths
acd858d91f
Handle EBase properly.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2613 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 23:18:13 +00:00
ths
1579a72ec5
Fix RDHWR handling. Code formatting. Don't use *_direct versions to raise
...
exceptions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2611 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 23:16:25 +00:00
ths
f7cfb2a176
64bit MIPS FPUs have 32 registers.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2610 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-05 23:14:23 +00:00
ths
876d4b0783
Fix code formatting.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2595 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-04 21:07:17 +00:00
ths
38121543c7
MIPS32R2 needs RDPGPR/WRPGPR instructions even when no shadow registers
...
are implemented.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2589 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-02 17:28:07 +00:00
ths
2d0e944d1c
Build fix for 64bit machines. (This is still not correct mul/div handling.)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2587 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-02 15:54:05 +00:00
ths
60aa19abef
Actually enable 64bit configuration.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 12:36:18 +00:00
ths
fbe4f65b28
MIPS64 configurations.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2564 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-01 11:16:48 +00:00
ths
a4bc3afc09
Malta CBUS UART support.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2557 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-31 16:54:14 +00:00
ths
7246bb21ba
Update mips TODO.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2549 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-30 18:56:19 +00:00
ths
36bb244bd3
Fix typo, suggested by Ben Taylor.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2548 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-30 18:42:21 +00:00
ths
5efbfeddac
Squash logic bugs while they are fresh...
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2547 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-30 17:48:00 +00:00
ths
24c7b0e330
Sanitize mips exception handling.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2546 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-30 16:44:54 +00:00
ths
34ee2edebb
One more bit of mips CPU configuration, and support for early 4KEc
...
which implemented only MIPS32R1. Thanks to Stefan Weil to insist he's
right on that. :-)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2533 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-24 23:36:18 +00:00
ths
e397ee3382
Fix enough FPU/R2 support to get 24Kf going.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2528 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-23 00:43:28 +00:00
ths
3953d78687
Move mips CPU specific initialization to translate_init.c.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2522 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-21 11:04:42 +00:00
ths
3ad4bb2d3d
Barf on branches/jumps in branch delay slots. Spotted by Stefan Weil.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2513 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-19 22:15:30 +00:00
ths
820e00f252
Define gen_intermediate_code_internal as "static inline".
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2512 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-19 21:46:06 +00:00
ths
8294eba187
SPARC host fixes, by Ben Taylor.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2503 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-19 14:47:40 +00:00
ths
39d51eb8bc
Fix BD flag handling, cause register contents, implement some more bits
...
for R2 interrupt handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2493 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-18 12:43:40 +00:00
ths
33d68b5f00
MIPS -cpu selection support, by Herve Poussineau.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-18 00:30:29 +00:00
ths
60a9f9ecd9
Note FPU enable/disable issue.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2489 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-17 15:39:48 +00:00
ths
6f5b89a07c
MIPS Userland TLS register emulation, by Daniel Jacobowitz.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2465 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-02 20:48:00 +00:00
ths
36d2395873
MIPS FPU dynamic activation, part 1, by Herve Poussineau.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2463 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-28 22:37:42 +00:00
ths
00a709c7b9
Fix mips FPU emulation, 32 bit data types are allowed to use odd registers.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2454 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-27 19:27:51 +00:00
ths
3594c77487
Replace TLSZ with TARGET_FMT_lx.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2444 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-20 23:37:21 +00:00
ths
925fd0f202
Fix sign-extension of VPN field in TLB, by Herve Poussineau.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2433 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-18 00:19:08 +00:00
ths
4a109bfbca
Update MIPS TODO.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2378 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-02 02:56:33 +00:00
ths
01d6a890b4
Sparc arm/mips/sparc register patch, by Martin Bochnig.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2377 c046a42c-6fe2-441c-8c8c-71466251a162
2007-02-02 01:03:34 +00:00
ths
b29a0341d7
EBase is limited to KSEG0/KSEG1 even on 64bit CPUs.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2351 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-24 18:01:23 +00:00
ths
4de9b249d3
Reworking MIPS interrupt handling, by Aurelien Jarno.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-24 01:47:51 +00:00
ths
9c2149c8e0
Implementing dmfc/dmtc.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2348 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-23 22:45:22 +00:00
ths
81e1e20979
Update TODO.
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2346 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-22 20:57:17 +00:00
ths
3b1c8be4f4
Fix PageMask handling, second part.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2345 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-22 20:50:42 +00:00
ths
72f341ed1e
TLB address wraparound hopefully fixed now.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2342 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-21 03:13:58 +00:00
ths
bc814401c2
Bring TLB / PageSize handling in line with real hardware behaviour.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2341 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-21 03:12:25 +00:00
ths
15dcf5aa86
Note more issues.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2335 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-19 17:56:23 +00:00
ths
2c52c8169a
Keep track of mips related issues.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2325 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-17 20:03:15 +00:00
bellard
2ee4aed86f
moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - suppressed invalid tb_invalidate_page_range() calls
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2287 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-03 15:18:08 +00:00
ths
0feef828e1
Fix bad data type.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2284 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-01 20:35:21 +00:00
ths
3a3f24fce8
Fix lwl/lwr for 64bit emulation, also debug output spec for 64bit emulation.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2283 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-01 20:34:37 +00:00
ths
7495fd0f4a
Simplify code and fix formatting.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2282 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-01 20:32:08 +00:00
ths
9042c0e20d
Check ELF binaries for machine type and endianness.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2274 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-23 14:18:40 +00:00
ths
70ead43412
Use memory barriers in FORCE_RET / RETURN.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2273 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-23 00:49:32 +00:00
ths
5dc4b74480
Scrap SIGN_EXTEND32.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2251 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-21 13:48:28 +00:00
ths
c570fd169c
Preliminiary MIPS64 support, disabled by default due to performance impact.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2250 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-21 01:19:56 +00:00
ths
179e32bbcc
Fix erraneous fallthrough in MIPS trap implementation, thanks Atsushi Nemoto.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2247 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-16 16:45:18 +00:00
ths
ca7c2b1b9f
Handle invalid accesses as SIGILL for mips/mipsel userland emulation.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2235 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-10 22:08:10 +00:00
ths
71fb7241c6
Fix build of MIPS target without FPU support.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2233 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-07 20:07:37 +00:00
ths
aa328addc0
Fix reset handling, CP0 isn't enabled by default (a fact which doesn't
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matter when running in kernel space).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2228 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-07 16:22:15 +00:00
ths
e144966416
Simplify mask construction.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2227 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-07 00:30:19 +00:00
ths
bb8a53ad91
Update copyright notice.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2226 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06 23:12:49 +00:00
ths
7a387fffce
Add MIPS32R2 instructions, and generally straighten out the instruction
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decoding. This is also the first percent towards MIPS64 support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2224 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06 20:17:30 +00:00
ths
8c0fdd856c
Dynamically translate MIPS mtc0 instructions.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2223 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06 18:19:33 +00:00
ths
873eb01234
Dynamically translate MIPS mfc0 instructions.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2222 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06 17:59:07 +00:00
ths
6ae817752b
Halt/reboot support for Linux, by Daniel Jacobowitz. This is a band-aid
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until we emulate real MIPS hardware with real firmware.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2221 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06 17:48:52 +00:00
ths
814b9a4749
MIPS TLB performance improvements, by Daniel Jacobowitz.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2220 c046a42c-6fe2-441c-8c8c-71466251a162
2006-12-06 17:42:40 +00:00
pbrook
417f38f066
MIPS FPU fixes (Daniel Jacobowitz).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2213 c046a42c-6fe2-441c-8c8c-71466251a162
2006-11-12 23:54:39 +00:00
pbrook
483dcf538e
Avoid redundant TLB flushes (Daniel Jacobowitz).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2211 c046a42c-6fe2-441c-8c8c-71466251a162
2006-11-12 20:55:05 +00:00
bellard
569f5d668c
compilation fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2205 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-29 15:10:09 +00:00
bellard
dd016883fb
add support for cvt.s.d and cvt.d.s (Aurelien Jarno)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2198 c046a42c-6fe2-441c-8c8c-71466251a162
2006-10-23 21:25:11 +00:00
bellard
3e382bc84c
consistent update of ERL and EXL
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(Dirk Behme)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2028 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-26 20:29:47 +00:00
bellard
d796321b6b
lwu support - generate exception if unaligned pc (Marius Groeger)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2025 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-26 20:02:45 +00:00
bellard
fdbb46910a
Solaris/SPARC host port (Ben Taylor)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1979 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-14 17:32:25 +00:00
bellard
43057ab127
use constants for TLB handling (Thiemo Seufer)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1978 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-14 17:15:19 +00:00
bellard
c5d6edc3fc
mips config fixes (initial patch by Stefan Weil)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1977 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-14 16:49:24 +00:00
bellard
6ea83fedc8
MIPS FPU support (Marius Goeger)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1964 c046a42c-6fe2-441c-8c8c-71466251a162
2006-06-14 12:56:19 +00:00
bellard
ba9a74dae0
fix wrong bitmasks for CP0_Context and CP0_EntryHi (Thiemo Seufer)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1937 c046a42c-6fe2-441c-8c8c-71466251a162
2006-05-22 22:14:43 +00:00
bellard
3d9fb9fefe
cosmetics (Thiemo Seufer)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1936 c046a42c-6fe2-441c-8c8c-71466251a162
2006-05-22 22:13:29 +00:00
bellard
9d05095e5f
mips cleanup (Thiemo Seufer)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1934 c046a42c-6fe2-441c-8c8c-71466251a162
2006-05-22 22:03:52 +00:00
bellard
f9ebe432db
removed unnecessary header
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1835 c046a42c-6fe2-441c-8c8c-71466251a162
2006-04-23 18:18:10 +00:00
bellard
ce2f4b3cb9
MIPS single stepping fix (Dirk Behme)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1830 c046a42c-6fe2-441c-8c8c-71466251a162
2006-04-23 15:23:48 +00:00
bellard
cd7dd10f09
MIPS CP0 not usable in kernel mode (Stefan Weil)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1829 c046a42c-6fe2-441c-8c8c-71466251a162
2006-04-23 15:21:24 +00:00
bellard
76e050c2e6
Fix overflow conditions for MIPS add / subtract (Stefan Weil)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1828 c046a42c-6fe2-441c-8c8c-71466251a162
2006-04-23 15:18:58 +00:00
pbrook
09c56b842e
Avoid flushing of global TLB entries for differing ASIDs (Thiemo Seufer).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1778 c046a42c-6fe2-441c-8c8c-71466251a162
2006-03-11 16:39:23 +00:00
pbrook
ecd78a0ac7
Clear MIPS_HFLAG_BMASK for ErrorEPC (Thiemo Seufer).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1777 c046a42c-6fe2-441c-8c8c-71466251a162
2006-03-11 16:35:30 +00:00
pbrook
56b194039e
Rename MIPS_HFLAG(S)_TMASK (Thiemo Seufer).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1775 c046a42c-6fe2-441c-8c8c-71466251a162
2006-03-11 16:23:39 +00:00
pbrook
98c1b82b6c
e bitfields in mips TLB structures (Thiemo Seufer).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1774 c046a42c-6fe2-441c-8c8c-71466251a162
2006-03-11 16:20:36 +00:00
pbrook
d2ec1774eb
Add missing function prototype.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1772 c046a42c-6fe2-441c-8c8c-71466251a162
2006-03-11 15:00:08 +00:00
bellard
01dbbdf1e5
disable debug mode
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1706 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-17 01:11:12 +00:00
bellard
9f25f11fe5
fix for mipsel (will need change for softmmu case)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1701 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-06 21:44:28 +00:00
bellard
4ad40f366f
MIPS fixes (Daniel Jacobowitz)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1690 c046a42c-6fe2-441c-8c8c-71466251a162
2005-12-05 19:59:36 +00:00
bellard
048f6b4df7
mips user emulation
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1668 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-26 18:47:20 +00:00
bellard
eeef26cd42
fixed BLTZAL and BLTZALL insns - fixed regressions from jmp opts
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1667 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-26 18:47:06 +00:00
bellard
173d6cfe51
cpu_exec_init() change
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1643 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-21 23:32:20 +00:00
bellard
a316d3353c
added CPU_COMMON and CPUState.tb_jmp_cache[]
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1630 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-20 10:32:34 +00:00
bellard
6e256c935c
use direct jump only for jumps in the same page
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1629 c046a42c-6fe2-441c-8c8c-71466251a162
2005-11-20 10:32:05 +00:00
bellard
c53be33474
suppressed JUMP_TB (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1594 c046a42c-6fe2-441c-8c8c-71466251a162
2005-10-30 21:39:19 +00:00
bellard
a9049a07bb
moved common softmmu code to common header (Paul Brook)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1580 c046a42c-6fe2-441c-8c8c-71466251a162
2005-10-30 18:16:26 +00:00
bellard
aefce9af41
compilation fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1507 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-07 19:07:52 +00:00
bellard
e37e863f5e
correct split between helper.c and op_helper.c - cosmetics
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1505 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-04 22:17:33 +00:00
bellard
1b351e5291
moved CALL_FROM_TBx definitions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1483 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:39:04 +00:00
bellard
0d8aca8c67
TLB reload exception vector (Ralf Baechle)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1481 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:35:03 +00:00
bellard
8549850891
fixed c0_context in tlb exception (Ralf Baechle)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1480 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:34:05 +00:00
bellard
7a962d3087
use MIPS_TLB_NB constant (Ralf Baechle)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1479 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:31:15 +00:00
bellard
e1d9a50836
use mask in C0_status (Ralf Baechle)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1478 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:29:46 +00:00
bellard
568b600d85
report C0 status correctly (Ralf Baechle)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1477 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:28:16 +00:00
bellard
bc2c390907
fixed priviledgees for CP0 use (Ralf Baechle)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1476 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:27:11 +00:00
bellard
51e11d9e6c
fixed eret insn (Ralf Baechle)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1474 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:23:21 +00:00
bellard
90b37806ba
fixed C0 status codes (Ralf Baechle)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1473 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:22:34 +00:00
bellard
9d1d106a3d
unaligned load fix (Ralf Baechle)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1471 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:20:06 +00:00
bellard
ae022501f2
soft irq are just irqs (Ralf Baechle)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1470 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:16:15 +00:00
bellard
dfae6487c0
remove nonsense exception code (Ralf Baechle)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1468 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:12:18 +00:00
bellard
bc9ed47b12
fixed jump mask (Ralf Baechle)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1466 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:10:44 +00:00
bellard
9fb63ac281
MIPS_USES_R4K_TLB typo
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1465 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 15:07:44 +00:00
bellard
6af0bf9c7c
MIPS target (Jocelyn Mayer)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1464 c046a42c-6fe2-441c-8c8c-71466251a162
2005-07-02 14:58:51 +00:00