237 lines
7.7 KiB
C
237 lines
7.7 KiB
C
/*
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* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "decode.h"
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#include "opcodes.h"
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#include "insn.h"
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#include "iclass.h"
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#include "mmvec/mmvec.h"
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#include "mmvec/decode_ext_mmvec.h"
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static void
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check_new_value(Packet *pkt)
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{
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/* .new value for a MMVector store */
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int i, j;
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const char *reginfo;
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const char *destletters;
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const char *dststr = NULL;
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uint16_t def_opcode;
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char letter;
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int def_regnum;
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for (i = 1; i < pkt->num_insns; i++) {
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uint16_t use_opcode = pkt->insn[i].opcode;
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if (GET_ATTRIB(use_opcode, A_DOTNEWVALUE) &&
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GET_ATTRIB(use_opcode, A_CVI) &&
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GET_ATTRIB(use_opcode, A_STORE)) {
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int use_regidx = strchr(opcode_reginfo[use_opcode], 's') -
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opcode_reginfo[use_opcode];
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/*
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* What's encoded at the N-field is the offset to who's producing
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* the value.
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* Shift off the LSB which indicates odd/even register.
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*/
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int def_off = ((pkt->insn[i].regno[use_regidx]) >> 1);
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int def_oreg = pkt->insn[i].regno[use_regidx] & 1;
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int def_idx = -1;
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for (j = i - 1; (j >= 0) && (def_off >= 0); j--) {
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if (!GET_ATTRIB(pkt->insn[j].opcode, A_CVI)) {
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continue;
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}
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def_off--;
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if (def_off == 0) {
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def_idx = j;
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break;
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}
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}
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/*
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* Check for a badly encoded N-field which points to an instruction
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* out-of-range
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*/
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g_assert(!((def_off != 0) || (def_idx < 0) ||
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(def_idx > (pkt->num_insns - 1))));
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/* def_idx is the index of the producer */
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def_opcode = pkt->insn[def_idx].opcode;
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reginfo = opcode_reginfo[def_opcode];
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destletters = "dexy";
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for (j = 0; (letter = destletters[j]) != 0; j++) {
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dststr = strchr(reginfo, letter);
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if (dststr != NULL) {
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break;
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}
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}
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if ((dststr == NULL) && GET_ATTRIB(def_opcode, A_CVI_GATHER)) {
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def_regnum = 0;
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pkt->insn[i].regno[use_regidx] = def_oreg;
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pkt->insn[i].new_value_producer_slot = pkt->insn[def_idx].slot;
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} else {
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if (dststr == NULL) {
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/* still not there, we have a bad packet */
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g_assert_not_reached();
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}
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def_regnum = pkt->insn[def_idx].regno[dststr - reginfo];
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/* Now patch up the consumer with the register number */
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pkt->insn[i].regno[use_regidx] = def_regnum ^ def_oreg;
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/* special case for (Vx,Vy) */
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dststr = strchr(reginfo, 'y');
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if (def_oreg && strchr(reginfo, 'x') && dststr) {
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def_regnum = pkt->insn[def_idx].regno[dststr - reginfo];
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pkt->insn[i].regno[use_regidx] = def_regnum;
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}
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/*
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* We need to remember who produces this value to later
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* check if it was dynamically cancelled
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*/
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pkt->insn[i].new_value_producer_slot = pkt->insn[def_idx].slot;
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}
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}
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}
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}
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/*
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* We don't want to reorder slot1/slot0 with respect to each other.
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* So in our shuffling, we don't want to move the .cur / .tmp vmem earlier
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* Instead, we should move the producing instruction later
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* But the producing instruction might feed a .new store!
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* So we may need to move that even later.
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*/
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static void
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decode_mmvec_move_cvi_to_end(Packet *pkt, int max)
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{
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int i;
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for (i = 0; i < max; i++) {
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if (GET_ATTRIB(pkt->insn[i].opcode, A_CVI)) {
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int last_inst = pkt->num_insns - 1;
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uint16_t last_opcode = pkt->insn[last_inst].opcode;
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/*
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* If the last instruction is an endloop, move to the one before it
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* Keep endloop as the last thing always
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*/
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if ((last_opcode == J2_endloop0) ||
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(last_opcode == J2_endloop1) ||
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(last_opcode == J2_endloop01)) {
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last_inst--;
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}
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decode_send_insn_to(pkt, i, last_inst);
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max--;
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i--; /* Retry this index now that packet has rotated */
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}
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}
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}
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static void
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decode_shuffle_for_execution_vops(Packet *pkt)
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{
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/*
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* Sort for .new
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*/
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int i;
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for (i = 0; i < pkt->num_insns; i++) {
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uint16_t opcode = pkt->insn[i].opcode;
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if (GET_ATTRIB(opcode, A_LOAD) &&
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(GET_ATTRIB(opcode, A_CVI_NEW) ||
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GET_ATTRIB(opcode, A_CVI_TMP))) {
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/*
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* Find prior consuming vector instructions
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* Move to end of packet
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*/
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decode_mmvec_move_cvi_to_end(pkt, i);
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break;
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}
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}
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/* Move HVX new value stores to the end of the packet */
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for (i = 0; i < pkt->num_insns - 1; i++) {
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uint16_t opcode = pkt->insn[i].opcode;
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if (GET_ATTRIB(opcode, A_STORE) &&
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GET_ATTRIB(opcode, A_CVI_NEW) &&
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!GET_ATTRIB(opcode, A_CVI_SCATTER_RELEASE)) {
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int last_inst = pkt->num_insns - 1;
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uint16_t last_opcode = pkt->insn[last_inst].opcode;
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/*
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* If the last instruction is an endloop, move to the one before it
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* Keep endloop as the last thing always
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*/
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if ((last_opcode == J2_endloop0) ||
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(last_opcode == J2_endloop1) ||
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(last_opcode == J2_endloop01)) {
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last_inst--;
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}
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decode_send_insn_to(pkt, i, last_inst);
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break;
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}
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}
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}
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static void
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check_for_vhist(Packet *pkt)
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{
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pkt->vhist_insn = NULL;
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for (int i = 0; i < pkt->num_insns; i++) {
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Insn *insn = &pkt->insn[i];
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int opcode = insn->opcode;
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if (GET_ATTRIB(opcode, A_CVI) && GET_ATTRIB(opcode, A_CVI_4SLOT)) {
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pkt->vhist_insn = insn;
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return;
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}
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}
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}
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/*
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* Public Functions
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*/
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SlotMask mmvec_ext_decode_find_iclass_slots(int opcode)
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{
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if (GET_ATTRIB(opcode, A_CVI_VM)) {
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/* HVX memory instruction */
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if (GET_ATTRIB(opcode, A_RESTRICT_SLOT0ONLY)) {
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return SLOTS_0;
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} else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT1ONLY)) {
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return SLOTS_1;
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}
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return SLOTS_01;
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} else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT2ONLY)) {
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return SLOTS_2;
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} else if (GET_ATTRIB(opcode, A_CVI_VX)) {
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/* HVX multiply instruction */
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return SLOTS_23;
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} else if (GET_ATTRIB(opcode, A_CVI_VS_VX)) {
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/* HVX permute/shift instruction */
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return SLOTS_23;
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} else {
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return SLOTS_0123;
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}
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}
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void mmvec_ext_decode_checks(Packet *pkt, bool disas_only)
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{
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check_new_value(pkt);
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if (!disas_only) {
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decode_shuffle_for_execution_vops(pkt);
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}
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check_for_vhist(pkt);
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}
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