e3e97e7c90
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2191 c046a42c-6fe2-441c-8c8c-71466251a162
70 lines
1.9 KiB
Diff
70 lines
1.9 KiB
Diff
Index: rombios.h
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===================================================================
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RCS file: /cvsroot/bochs/bochs/bios/rombios.h,v
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retrieving revision 1.2
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diff -u -w -r1.2 rombios.h
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--- rombios.h 1 Oct 2006 16:39:18 -0000 1.2
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+++ rombios.h 2 Oct 2006 18:31:41 -0000
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@@ -19,7 +19,7 @@
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// Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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/* define it to include QEMU specific code */
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-//#define BX_QEMU
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+#define BX_QEMU
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#define BX_ROMBIOS32 1
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#define DEBUG_ROMBIOS 0
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Index: rombios32.c
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===================================================================
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RCS file: /cvsroot/bochs/bochs/bios/rombios32.c,v
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retrieving revision 1.6
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diff -u -w -r1.6 rombios32.c
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--- rombios32.c 2 Oct 2006 06:29:37 -0000 1.6
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+++ rombios32.c 2 Oct 2006 18:31:41 -0000
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@@ -45,6 +45,8 @@
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: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) \
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: "0" (index))
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+#define wbinvd() asm volatile("wbinvd")
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+
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#define CPUID_APIC (1 << 9)
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#define APIC_BASE ((uint8_t *)0xfee00000)
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@@ -591,6 +593,7 @@
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PCIDevice *d = &i440_pcidev;
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int v;
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+ wbinvd();
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v = pci_config_readb(d, 0x59);
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v = (v & 0x0f) | (0x10);
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pci_config_writeb(d, 0x59, v);
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@@ -645,7 +648,7 @@
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outb(0xb3, 0x01);
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/* raise an SMI interrupt */
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- outb(0xb2, 0x01);
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+ outb(0xb2, 0x00);
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/* wait until SMM code executed */
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while (inb(0xb3) != 0x00);
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@@ -656,6 +659,7 @@
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/* copy the SMM code */
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memcpy((void *)0xa8000, &smm_code_start,
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&smm_code_end - &smm_code_start);
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+ wbinvd();
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/* close the SMM memory window and enable normal SMM */
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pci_config_writeb(&i440_pcidev, 0x72, 0x02 | 0x08);
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@@ -848,6 +852,11 @@
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int ioapic_id, i, len;
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int mp_config_table_size;
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+#ifdef BX_QEMU
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+ if (smp_cpus <= 1)
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+ return;
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+#endif
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+
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#ifdef BX_USE_EBDA_TABLES
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mp_config_table = (uint8_t *)(ram_size - ACPI_DATA_SIZE - MPTABLE_MAX_SIZE);
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#else
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