a3c1ca56c0
The PL011 UART has six interrupt lines: * RX (receive data) * TX (transmit data) * RT (receive timeout) * MS (modem status) * E (errors) * combined (logical OR of all the above) So far we have only emulated the combined interrupt line; add support for the others, so that boards that wire them up to different interrupt controller inputs can do so. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
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| .. | ||
| bcm2835_aux.h | ||
| cadence_uart.h | ||
| cmsdk-apb-uart.h | ||
| digic-uart.h | ||
| escc.h | ||
| imx_serial.h | ||
| lm32_juart.h | ||
| nrf51_uart.h | ||
| parallel.h | ||
| pl011.h | ||
| serial.h | ||
| stm32f2xx_usart.h | ||
| xilinx_uartlite.h | ||