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qemu-e2k/target/ppc
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Daniel Henrique Barboza 0625c7760d target/ppc: do not call hreg_compute_hflags() in helper_store_mmcr0() 
MMCR0 writes will change only MMCR0 bits which are used to calculate
HFLAGS_PMCC0, HFLAGS_PMCC1 and HFLAGS_INSN_CNT hflags. No other machine
register will be changed during this operation. This means that
hreg_compute_hflags() is overkill for what we need to do.

pmu_update_summaries() is already updating HFLAGS_INSN_CNT without
calling hreg_compure_hflags(). Let's do the same for the other 2 MMCR0
hflags.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220103224746.167831-5-danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
 		2022-01-04 07:55:35 +01:00
..
translate PPC64/TCG: Implement 'rfebb' instruction 2021-12-17 17:57:19 +01:00
Kconfig
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arch_dump.c
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compat.c
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cpu-models.c target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
cpu-models.h target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
cpu-param.h
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cpu-qom.h target/ppc: remove 401/403 CPUs 2021-12-17 17:57:16 +01:00
cpu.c target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52 2021-12-17 17:57:13 +01:00
cpu.h target/ppc: Cache per-pmc insn and cycle count settings 2022-01-04 07:55:34 +01:00
cpu_init.c target/ppc: Cache per-pmc insn and cycle count settings 2022-01-04 07:55:34 +01:00
dfp_helper.c target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree 2021-11-09 10:32:52 +11:00
excp_helper.c target/ppc: powerpc_excp: Stop passing excp_model around 2022-01-04 07:55:34 +01:00
fpu_helper.c target/ppc: do not silence snan in xscvspdpn 2022-01-04 07:55:34 +01:00
gdbstub.c target/ppc: Fix XER access in gdbstub 2021-10-21 11:42:47 +11:00
helper.h ppc/ppc405: Restore TCR and STR write handlers 2022-01-04 07:55:34 +01:00
helper_regs.c target/ppc: Cache per-pmc insn and cycle count settings 2022-01-04 07:55:34 +01:00
helper_regs.h
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insn32.decode PPC64/TCG: Implement 'rfebb' instruction 2021-12-17 17:57:19 +01:00
insn64.decode target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions 2021-11-09 10:32:53 +11:00
int_helper.c target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions 2021-11-09 10:32:53 +11:00
internal.h target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu 2021-11-02 07:00:52 -04:00
kvm-stub.c
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kvm.c
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kvm_ppc.h
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machine.c target/ppc: Cache per-pmc insn and cycle count settings 2022-01-04 07:55:34 +01:00
mem_helper.c accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h 2021-10-13 08:14:54 -07:00
meson.build target/ppc: introduce PMUEventType and PMU overflow timers 2021-12-17 17:57:18 +01:00
mfrom_table.c.inc
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mfrom_table_gen.c
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misc_helper.c
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mmu-book3s-v3.c
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mmu-book3s-v3.h
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mmu-books.h
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mmu-hash32.c
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mmu-hash32.h
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mmu-hash64.c target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-hash64.h target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-radix64.c target/ppc: Check effective address validity 2022-01-04 07:55:34 +01:00
mmu-radix64.h target/ppc: Check effective address validity 2022-01-04 07:55:34 +01:00
mmu_common.c ppc/ppc405: Activate MMU logs 2022-01-04 07:55:34 +01:00
mmu_helper.c ppc/ppc405: Activate MMU logs 2022-01-04 07:55:34 +01:00
monitor.c target/ppc: Fix XER access in monitor 2021-10-21 11:42:47 +11:00
power8-pmu-regs.c.inc target/ppc: enable PMU instruction count 2021-12-17 17:57:18 +01:00
power8-pmu.c target/ppc: do not call hreg_compute_hflags() in helper_store_mmcr0() 2022-01-04 07:55:35 +01:00
power8-pmu.h target/ppc: Cache per-pmc insn and cycle count settings 2022-01-04 07:55:34 +01:00
spr_tcg.h ppc/ppc405: Introduce a store helper for SPR_40x_PID 2022-01-04 07:55:34 +01:00
tcg-stub.c
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timebase_helper.c ppc/ppc405: Restore TCR and STR write handlers 2022-01-04 07:55:34 +01:00
trace-events target/ppc: Convert debug to trace events (exceptions) 2021-09-30 12:26:06 +10:00
trace.h
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translate.c ppc/ppc405: Introduce a store helper for SPR_40x_PID 2022-01-04 07:55:34 +01:00
user_only_helper.c target/ppc: Implement ppc_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00