qemu-e2k/include/hw
Havard Skinnemoen 2ddae9cc04 hw/arm/npcm7xx: add board setup stub for CPU and UART clocks
When booting directly into a kernel, bypassing the boot loader, the CPU and
UART clocks are not set up correctly. This makes the system appear very
slow, and causes the initrd boot test to fail when optimization is off.

The UART clock must run at 24 MHz. The default 25 MHz reference clock
cannot achieve this, so switch to PLL2/2 @ 480 MHz, which works
perfectly with the default /20 divider.

The CPU clock should run at 800 MHz, so switch it to PLL1/2. PLL1 runs
at 800 MHz by default, so we need to double the feedback divider as well
to make it run at 1600 MHz (so PLL1/2 runs at 800 MHz).

We don't bother checking for PLL lock because we know our emulated PLLs
lock instantly.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Message-id: 20200911052101.2602693-13-hskinnemoen@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-09-14 14:24:59 +01:00
..
acpi vmgenid: Rename VMGENID_DEVICE to TYPE_VMGENID 2020-09-09 13:20:22 -04:00
adc Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
arm hw/arm/npcm7xx: add board setup stub for CPU and UART clocks 2020-09-14 14:24:59 +01:00
audio
block Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
char This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
core Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
cpu Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
cris
display Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
dma This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
firmware
gpio This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
hyperv Use OBJECT_DECLARE_TYPE where possible 2020-09-09 09:27:11 -04:00
i2c Use OBJECT_DECLARE_TYPE where possible 2020-09-09 09:27:11 -04:00
i386 Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
ide ahci: Rename ICH_AHCI to ICH9_AHCI 2020-09-09 13:20:22 -04:00
input Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
intc This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
ipack Use OBJECT_DECLARE_TYPE where possible 2020-09-09 09:27:11 -04:00
ipmi Use OBJECT_DECLARE_TYPE where possible 2020-09-09 09:27:11 -04:00
isa pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312 2020-09-09 13:20:22 -04:00
kvm
lm32
m68k Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
mem hw/mem: Stubbed out NPCM7xx Memory Controller model 2020-09-14 14:24:59 +01:00
mips Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
misc hw/misc: Add NPCM7xx Clock Controller device model 2020-09-14 14:24:58 +01:00
net This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
nubus Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
nvram hw/nvram: NPCM7xx OTP device model 2020-09-14 14:24:59 +01:00
pci Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
pci-bridge Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
pci-host sabre: Rename SABRE_DEVICE to SABRE 2020-09-09 13:20:22 -04:00
ppc Use OBJECT_DECLARE_TYPE where possible 2020-09-09 09:27:11 -04:00
rdma Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
riscv This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
rtc Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
rx Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
s390x ap-device: Rename AP_DEVICE_TYPE to TYPE_AP_DEVICE 2020-09-09 13:20:22 -04:00
scsi esp: Rename ESP_STATE to ESP 2020-09-09 13:20:22 -04:00
sd This PR includes multiple fixes and features for RISC-V: 2020-09-13 20:29:35 +01:00
semihosting
sh4
southbridge Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
sparc Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
ssi hw/ssi: NPCM7xx Flash Interface Unit device model 2020-09-14 14:24:59 +01:00
timer hw/timer: Add NPCM7xx Timer device model 2020-09-14 14:24:58 +01:00
tricore
unicore32
usb Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
vfio Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
virtio Use OBJECT_DECLARE_TYPE where possible 2020-09-09 09:27:11 -04:00
watchdog Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
xen Use OBJECT_DECLARE_TYPE where possible 2020-09-09 09:27:11 -04:00
xtensa
boards.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
clock.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
elf_ops.h
fw-path-provider.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
hotplug.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
hw.h
ide.h
irq.h include/hw/irq.h: New function qemu_irq_is_connected() 2020-08-03 17:55:03 +01:00
loader-fit.h
loader.h
nmi.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
or-irq.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
pcmcia.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
platform-bus.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
ptimer.h
qdev-clock.h hw/qdev-clock: Avoid calling qdev_connect_clock_in after DeviceRealize 2020-08-28 10:02:46 +01:00
qdev-core.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
qdev-dma.h
qdev-properties.h qdev: Document qdev_prop_set_drive_err() return value 2020-08-19 10:44:29 -04:00
register.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
registerfields.h
resettable.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
stream.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
sysbus.h Use OBJECT_DECLARE_TYPE where possible 2020-09-09 09:27:11 -04:00
usb.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
vmstate-if.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00