02bccc7796
The SPD EEPROM specifies the amount of memory present in the system and thus its correct contents can only be known at runtime. Calculating parts of the data on init allows the data to accurately reflect the amount of target memory present and allow YAMON to boot with an arbitrary amount of SDRAM. Where possible the SPD data will favor indicating 2 banks of SDRAM rather than 1. For example the default 128MB of target memory will be represented as 2x64MB banks rather than 1x128MB bank. This allows versions of MIPS BIOS code (such as YAMON 2.22 and older) to boot despite a bug preventing them from handling a single bank of SDRAM with the Galileo GT64120 system controller emulated by QEMU. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> |
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| .. | ||
| addr.c | ||
| cputimer.c | ||
| gt64xxx_pci.c | ||
| Makefile.objs | ||
| mips_fulong2e.c | ||
| mips_int.c | ||
| mips_jazz.c | ||
| mips_malta.c | ||
| mips_mipssim.c | ||
| mips_r4k.c | ||