fcf5ef2ab5
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [crisµblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
21 lines
478 B
C
21 lines
478 B
C
#ifndef HW_MIPS_CPUDEVS_H
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#define HW_MIPS_CPUDEVS_H
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#include "target/mips/cpu-qom.h"
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/* Definitions for MIPS CPU internal devices. */
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/* mips_addr.c */
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uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr);
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uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr);
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uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr);
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/* mips_int.c */
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void cpu_mips_irq_init_cpu(MIPSCPU *cpu);
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/* mips_timer.c */
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void cpu_mips_clock_init(MIPSCPU *cpu);
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#endif
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