Peter Crosthwaite 06c2fe951d net/cadence_gem: Prefetch rx descriptors ASAP
The real hardware prefetches rx buffer descriptors ASAP and
potentially throws relevant interrupts following the fetch
even in the absence of a received packet.

Reported-by: Deepika Dhamija <deepika@xilinx.com>
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 41629e35edfdb1f02f1e401f2c3d0e2e4c9e44b3.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10 13:28:50 +00:00
2013-04-18 13:50:53 +02:00
2013-07-09 13:38:56 -05:00
2013-12-06 08:55:42 +01:00
2013-08-07 12:48:00 -05:00
2013-11-25 20:35:28 -08:00
2013-12-06 08:55:42 +01:00
2013-05-03 13:58:09 +02:00
2013-12-02 21:02:57 +04:00
2013-10-11 09:34:56 -07:00
2013-09-05 09:40:31 -05:00
2013-10-11 10:52:54 +02:00
2013-10-11 09:34:56 -07:00
2013-11-25 09:49:43 -08:00
2013-11-06 21:47:05 -08:00
2013-11-04 15:39:41 +02:00
2013-07-23 02:41:31 +02:00
2013-10-17 10:10:14 +02:00
2013-08-12 09:15:12 -05:00
2013-09-03 12:25:55 +02:00
2013-10-31 16:58:32 +01:00
2013-09-06 15:25:08 +02:00
2013-05-18 16:35:12 +04:00
2013-12-04 15:19:00 +01:00
2013-12-04 15:19:00 +01:00
2013-07-19 12:52:03 +04:00
2013-05-01 13:06:07 +02:00
2013-09-02 09:08:29 -07:00
2013-10-11 09:34:56 -07:00
2013-09-25 21:23:05 +02:00
2013-11-27 14:02:45 -08:00
2013-10-11 09:34:56 -07:00
2013-04-08 18:13:10 +02:00

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