Cédric Le Goater 0707b34dcb aspeed/smc: autostrap CE0/1 configuration ... On the AST2500 SoC, the FMC controller flash type is fixed to SPI for CE0 and CE1 and 4BYTE mode is autodetected for CE0. On the AST2400 SoC, the FMC controller flash type and 4BYTE mode are strapped with register SCU70. We use the default settings from the palmetto-bmc machine for now. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1483979087-32663-5-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2017-01-20 11:15:07 +00:00
..
aspeed_smc.c	aspeed/smc: autostrap CE0/1 configuration	2017-01-20 11:15:07 +00:00
imx_spi.c	hw/ssi/imx_spi.c: Remove MSGDATA register support	2017-01-09 11:50:23 +00:00
Makefile.objs	STM32F2xx: Add the SPI device	2016-10-04 13:28:07 +01:00
omap_spi.c
pl022.c
ssi.c	ssi: change ssi_slave_init to be a realize ops	2016-07-04 13:15:22 +01:00
stm32f2xx_spi.c	STM32F2xx: Add the SPI device	2016-10-04 13:28:07 +01:00
xilinx_spi.c
xilinx_spips.c	xilinx: fix buffer overflow on realize	2016-10-24 15:27:20 +02:00