164 lines
4.3 KiB
C
164 lines
4.3 KiB
C
/*
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* TI OMAP L4 interconnect emulation.
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*
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* Copyright (C) 2007-2009 Nokia Corporation
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* Written by Andrzej Zaborowski <andrew@openedhand.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 or
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* (at your option) any later version of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "hw/arm/omap.h"
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struct omap_l4_s {
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MemoryRegion *address_space;
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hwaddr base;
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int ta_num;
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struct omap_target_agent_s ta[];
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};
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struct omap_l4_s *omap_l4_init(MemoryRegion *address_space,
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hwaddr base, int ta_num)
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{
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struct omap_l4_s *bus = g_malloc0(
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sizeof(*bus) + ta_num * sizeof(*bus->ta));
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bus->address_space = address_space;
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bus->ta_num = ta_num;
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bus->base = base;
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return bus;
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}
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hwaddr omap_l4_region_base(struct omap_target_agent_s *ta,
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int region)
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{
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return ta->bus->base + ta->start[region].offset;
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}
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hwaddr omap_l4_region_size(struct omap_target_agent_s *ta,
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int region)
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{
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return ta->start[region].size;
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}
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static uint64_t omap_l4ta_read(void *opaque, hwaddr addr,
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unsigned size)
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{
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struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
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if (size != 2) {
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return omap_badwidth_read16(opaque, addr);
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}
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switch (addr) {
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case 0x00: /* COMPONENT */
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return s->component;
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case 0x20: /* AGENT_CONTROL */
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return s->control;
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case 0x28: /* AGENT_STATUS */
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return s->status;
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}
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OMAP_BAD_REG(addr);
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return 0;
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}
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static void omap_l4ta_write(void *opaque, hwaddr addr,
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uint64_t value, unsigned size)
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{
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struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
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if (size != 4) {
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omap_badwidth_write32(opaque, addr, value);
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return;
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}
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switch (addr) {
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case 0x00: /* COMPONENT */
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case 0x28: /* AGENT_STATUS */
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OMAP_RO_REG(addr);
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break;
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case 0x20: /* AGENT_CONTROL */
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s->control = value & 0x01000700;
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if (value & 1) /* OCP_RESET */
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s->status &= ~1; /* REQ_TIMEOUT */
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break;
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default:
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OMAP_BAD_REG(addr);
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}
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}
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static const MemoryRegionOps omap_l4ta_ops = {
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.read = omap_l4ta_read,
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.write = omap_l4ta_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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struct omap_target_agent_s *omap_l4ta_get(struct omap_l4_s *bus,
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const struct omap_l4_region_s *regions,
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const struct omap_l4_agent_info_s *agents,
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int cs)
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{
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int i;
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struct omap_target_agent_s *ta = NULL;
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const struct omap_l4_agent_info_s *info = NULL;
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for (i = 0; i < bus->ta_num; i ++)
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if (agents[i].ta == cs) {
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ta = &bus->ta[i];
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info = &agents[i];
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break;
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}
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if (!ta) {
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fprintf(stderr, "%s: bad target agent (%i)\n", __func__, cs);
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exit(-1);
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}
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ta->bus = bus;
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ta->start = ®ions[info->region];
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ta->regions = info->regions;
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ta->component = ('Q' << 24) | ('E' << 16) | ('M' << 8) | ('U' << 0);
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ta->status = 0x00000000;
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ta->control = 0x00000200; /* XXX 01000200 for L4TAO */
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memory_region_init_io(&ta->iomem, NULL, &omap_l4ta_ops, ta, "omap.l4ta",
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omap_l4_region_size(ta, info->ta_region));
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omap_l4_attach(ta, info->ta_region, &ta->iomem);
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return ta;
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}
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hwaddr omap_l4_attach(struct omap_target_agent_s *ta,
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int region, MemoryRegion *mr)
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{
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hwaddr base;
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if (region < 0 || region >= ta->regions) {
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fprintf(stderr, "%s: bad io region (%i)\n", __func__, region);
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exit(-1);
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}
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base = ta->bus->base + ta->start[region].offset;
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if (mr) {
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memory_region_add_subregion(ta->bus->address_space, base, mr);
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}
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return base;
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}
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