679dd1a957
For compatibility reasons PC/Q35 will start with legacy CPU hotplug interface by default but with new CPU hotplug AML code since 2.7 machine type. That way legacy firmware that doesn't use QEMU generated ACPI tables will be able to continue using legacy CPU hotplug interface. While new machine type, with firmware supporting QEMU provided ACPI tables, will generate new CPU hotplug AML, which will switch to new CPU hotplug interface when guest OS executes its _INI method on ACPI tables loading. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
333 lines
11 KiB
C
333 lines
11 KiB
C
/*
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* QEMU ACPI hotplug utilities
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*
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* Copyright (C) 2013 Red Hat Inc
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*
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* Authors:
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* Igor Mammedov <imammedo@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "hw/hw.h"
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#include "hw/acpi/cpu_hotplug.h"
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#include "qapi/error.h"
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#include "qom/cpu.h"
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#include "hw/i386/pc.h"
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#define CPU_EJECT_METHOD "CPEJ"
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#define CPU_MAT_METHOD "CPMA"
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#define CPU_ON_BITMAP "CPON"
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#define CPU_STATUS_METHOD "CPST"
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#define CPU_STATUS_MAP "PRS"
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#define CPU_SCAN_METHOD "PRSC"
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static uint64_t cpu_status_read(void *opaque, hwaddr addr, unsigned int size)
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{
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AcpiCpuHotplug *cpus = opaque;
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uint64_t val = cpus->sts[addr];
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return val;
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}
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static void cpu_status_write(void *opaque, hwaddr addr, uint64_t data,
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unsigned int size)
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{
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/* firmware never used to write in CPU present bitmap so use
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this fact as means to switch QEMU into modern CPU hotplug
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mode by writing 0 at the beginning of legacy CPU bitmap
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*/
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if (addr == 0 && data == 0) {
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AcpiCpuHotplug *cpus = opaque;
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object_property_set_bool(cpus->device, false, "cpu-hotplug-legacy",
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&error_abort);
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}
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}
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static const MemoryRegionOps AcpiCpuHotplug_ops = {
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.read = cpu_status_read,
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.write = cpu_status_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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.valid = {
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.min_access_size = 1,
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.max_access_size = 1,
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},
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};
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static void acpi_set_cpu_present_bit(AcpiCpuHotplug *g, CPUState *cpu,
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Error **errp)
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{
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CPUClass *k = CPU_GET_CLASS(cpu);
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int64_t cpu_id;
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cpu_id = k->get_arch_id(cpu);
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if ((cpu_id / 8) >= ACPI_GPE_PROC_LEN) {
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error_setg(errp, "acpi: invalid cpu id: %" PRIi64, cpu_id);
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return;
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}
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g->sts[cpu_id / 8] |= (1 << (cpu_id % 8));
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}
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void legacy_acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
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AcpiCpuHotplug *g, DeviceState *dev, Error **errp)
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{
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acpi_set_cpu_present_bit(g, CPU(dev), errp);
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if (*errp != NULL) {
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return;
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}
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acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
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}
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void legacy_acpi_cpu_hotplug_init(MemoryRegion *parent, Object *owner,
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AcpiCpuHotplug *gpe_cpu, uint16_t base)
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{
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CPUState *cpu;
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CPU_FOREACH(cpu) {
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acpi_set_cpu_present_bit(gpe_cpu, cpu, &error_abort);
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}
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memory_region_init_io(&gpe_cpu->io, owner, &AcpiCpuHotplug_ops,
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gpe_cpu, "acpi-cpu-hotplug", ACPI_GPE_PROC_LEN);
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memory_region_add_subregion(parent, base, &gpe_cpu->io);
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gpe_cpu->device = owner;
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}
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void acpi_switch_to_modern_cphp(AcpiCpuHotplug *gpe_cpu,
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CPUHotplugState *cpuhp_state,
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uint16_t io_port)
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{
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MemoryRegion *parent = pci_address_space_io(PCI_DEVICE(gpe_cpu->device));
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memory_region_del_subregion(parent, &gpe_cpu->io);
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cpu_hotplug_hw_init(parent, gpe_cpu->device, cpuhp_state, io_port);
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}
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void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
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uint16_t io_base)
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{
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Aml *dev;
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Aml *crs;
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Aml *pkg;
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Aml *field;
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Aml *method;
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Aml *if_ctx;
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Aml *else_ctx;
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int i, apic_idx;
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Aml *sb_scope = aml_scope("_SB");
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uint8_t madt_tmpl[8] = {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0};
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Aml *cpu_id = aml_arg(1);
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Aml *apic_id = aml_arg(0);
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Aml *cpu_on = aml_local(0);
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Aml *madt = aml_local(1);
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Aml *cpus_map = aml_name(CPU_ON_BITMAP);
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Aml *zero = aml_int(0);
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Aml *one = aml_int(1);
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine);
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PCMachineState *pcms = PC_MACHINE(machine);
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/*
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* _MAT method - creates an madt apic buffer
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* apic_id = Arg0 = Local APIC ID
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* cpu_id = Arg1 = Processor ID
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* cpu_on = Local0 = CPON flag for this cpu
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* madt = Local1 = Buffer (in madt apic form) to return
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*/
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method = aml_method(CPU_MAT_METHOD, 2, AML_NOTSERIALIZED);
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aml_append(method,
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aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
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aml_append(method,
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aml_store(aml_buffer(sizeof(madt_tmpl), madt_tmpl), madt));
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/* Update the processor id, lapic id, and enable/disable status */
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aml_append(method, aml_store(cpu_id, aml_index(madt, aml_int(2))));
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aml_append(method, aml_store(apic_id, aml_index(madt, aml_int(3))));
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aml_append(method, aml_store(cpu_on, aml_index(madt, aml_int(4))));
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aml_append(method, aml_return(madt));
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aml_append(sb_scope, method);
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/*
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* _STA method - return ON status of cpu
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* apic_id = Arg0 = Local APIC ID
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* cpu_on = Local0 = CPON flag for this cpu
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*/
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method = aml_method(CPU_STATUS_METHOD, 1, AML_NOTSERIALIZED);
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aml_append(method,
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aml_store(aml_derefof(aml_index(cpus_map, apic_id)), cpu_on));
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if_ctx = aml_if(cpu_on);
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{
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aml_append(if_ctx, aml_return(aml_int(0xF)));
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}
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aml_append(method, if_ctx);
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else_ctx = aml_else();
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{
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aml_append(else_ctx, aml_return(zero));
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}
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aml_append(method, else_ctx);
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aml_append(sb_scope, method);
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method = aml_method(CPU_EJECT_METHOD, 2, AML_NOTSERIALIZED);
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aml_append(method, aml_sleep(200));
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aml_append(sb_scope, method);
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method = aml_method(CPU_SCAN_METHOD, 0, AML_NOTSERIALIZED);
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{
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Aml *while_ctx, *if_ctx2, *else_ctx2;
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Aml *bus_check_evt = aml_int(1);
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Aml *remove_evt = aml_int(3);
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Aml *status_map = aml_local(5); /* Local5 = active cpu bitmap */
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Aml *byte = aml_local(2); /* Local2 = last read byte from bitmap */
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Aml *idx = aml_local(0); /* Processor ID / APIC ID iterator */
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Aml *is_cpu_on = aml_local(1); /* Local1 = CPON flag for cpu */
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Aml *status = aml_local(3); /* Local3 = active state for cpu */
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aml_append(method, aml_store(aml_name(CPU_STATUS_MAP), status_map));
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aml_append(method, aml_store(zero, byte));
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aml_append(method, aml_store(zero, idx));
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/* While (idx < SizeOf(CPON)) */
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while_ctx = aml_while(aml_lless(idx, aml_sizeof(cpus_map)));
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aml_append(while_ctx,
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aml_store(aml_derefof(aml_index(cpus_map, idx)), is_cpu_on));
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if_ctx = aml_if(aml_and(idx, aml_int(0x07), NULL));
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{
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/* Shift down previously read bitmap byte */
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aml_append(if_ctx, aml_shiftright(byte, one, byte));
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}
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aml_append(while_ctx, if_ctx);
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else_ctx = aml_else();
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{
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/* Read next byte from cpu bitmap */
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aml_append(else_ctx, aml_store(aml_derefof(aml_index(status_map,
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aml_shiftright(idx, aml_int(3), NULL))), byte));
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}
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aml_append(while_ctx, else_ctx);
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aml_append(while_ctx, aml_store(aml_and(byte, one, NULL), status));
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if_ctx = aml_if(aml_lnot(aml_equal(is_cpu_on, status)));
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{
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/* State change - update CPON with new state */
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aml_append(if_ctx, aml_store(status, aml_index(cpus_map, idx)));
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if_ctx2 = aml_if(aml_equal(status, one));
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{
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aml_append(if_ctx2,
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aml_call2(AML_NOTIFY_METHOD, idx, bus_check_evt));
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}
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aml_append(if_ctx, if_ctx2);
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else_ctx2 = aml_else();
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{
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aml_append(else_ctx2,
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aml_call2(AML_NOTIFY_METHOD, idx, remove_evt));
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}
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}
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aml_append(if_ctx, else_ctx2);
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aml_append(while_ctx, if_ctx);
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aml_append(while_ctx, aml_increment(idx)); /* go to next cpu */
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aml_append(method, while_ctx);
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}
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aml_append(sb_scope, method);
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/* The current AML generator can cover the APIC ID range [0..255],
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* inclusive, for VCPU hotplug. */
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QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
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g_assert(pcms->apic_id_limit <= ACPI_CPU_HOTPLUG_ID_LIMIT);
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/* create PCI0.PRES device and its _CRS to reserve CPU hotplug MMIO */
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dev = aml_device("PCI0." stringify(CPU_HOTPLUG_RESOURCE_DEVICE));
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aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06")));
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aml_append(dev,
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aml_name_decl("_UID", aml_string("CPU Hotplug resources"))
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);
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/* device present, functioning, decoding, not shown in UI */
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aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
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crs = aml_resource_template();
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aml_append(crs,
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aml_io(AML_DECODE16, io_base, io_base, 1, ACPI_GPE_PROC_LEN)
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);
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(sb_scope, dev);
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/* declare CPU hotplug MMIO region and PRS field to access it */
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aml_append(sb_scope, aml_operation_region(
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"PRST", AML_SYSTEM_IO, aml_int(io_base), ACPI_GPE_PROC_LEN));
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field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
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aml_append(field, aml_named_field("PRS", 256));
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aml_append(sb_scope, field);
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/* build Processor object for each processor */
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for (i = 0; i < apic_ids->len; i++) {
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int apic_id = apic_ids->cpus[i].arch_id;
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assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT);
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dev = aml_processor(i, 0, 0, "CP%.02X", apic_id);
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method = aml_method("_MAT", 0, AML_NOTSERIALIZED);
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aml_append(method,
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aml_return(aml_call2(CPU_MAT_METHOD, aml_int(apic_id), aml_int(i))
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));
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aml_append(dev, method);
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method = aml_method("_STA", 0, AML_NOTSERIALIZED);
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aml_append(method,
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aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(apic_id))));
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aml_append(dev, method);
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method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
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aml_append(method,
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aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(apic_id),
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aml_arg(0)))
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);
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aml_append(dev, method);
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aml_append(sb_scope, dev);
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}
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/* build this code:
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* Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}
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*/
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/* Arg0 = APIC ID */
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method = aml_method(AML_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
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for (i = 0; i < apic_ids->len; i++) {
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int apic_id = apic_ids->cpus[i].arch_id;
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if_ctx = aml_if(aml_equal(aml_arg(0), aml_int(apic_id)));
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aml_append(if_ctx,
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aml_notify(aml_name("CP%.02X", apic_id), aml_arg(1))
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);
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aml_append(method, if_ctx);
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}
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aml_append(sb_scope, method);
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/* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })"
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*
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* Note: The ability to create variable-sized packages was first
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* introduced in ACPI 2.0. ACPI 1.0 only allowed fixed-size packages
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* ith up to 255 elements. Windows guests up to win2k8 fail when
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* VarPackageOp is used.
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*/
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pkg = pcms->apic_id_limit <= 255 ? aml_package(pcms->apic_id_limit) :
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aml_varpackage(pcms->apic_id_limit);
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for (i = 0, apic_idx = 0; i < apic_ids->len; i++) {
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int apic_id = apic_ids->cpus[i].arch_id;
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for (; apic_idx < apic_id; apic_idx++) {
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aml_append(pkg, aml_int(0));
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}
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aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0));
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apic_idx = apic_id + 1;
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}
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aml_append(sb_scope, aml_name_decl(CPU_ON_BITMAP, pkg));
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g_free(apic_ids);
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aml_append(ctx, sb_scope);
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method = aml_method("\\_GPE._E02", 0, AML_NOTSERIALIZED);
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aml_append(method, aml_call0("\\_SB." CPU_SCAN_METHOD));
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aml_append(ctx, method);
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}
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