qemu-e2k/target/arm
Peter Maydell 384c6c03fb target/arm/translate.c: Fix missing 'break' for TT insns
The code where we added the TT instruction was accidentally
missing a 'break', which meant that after generating the code
to execute the TT we would fall through to 'goto illegal_op'
and generate code to take an UNDEF insn.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180206103941.13985-1-peter.maydell@linaro.org
2018-02-09 10:55:39 +00:00
..
arch_dump.c
arm_ldst.h
arm-powerctl.c
arm-powerctl.h
arm-semi.c
cpu64.c
cpu-qom.h
cpu.c
cpu.h target/arm: Add SVE state to TB->FLAGS 2018-02-09 10:55:27 +00:00
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c
helper-a64.h
helper.c target/arm: Add SVE state to TB->FLAGS 2018-02-09 10:55:27 +00:00
helper.h
internals.h
iwmmxt_helper.c
kvm32.c
kvm64.c
kvm_arm.h target/arm/kvm: gic: Prevent creating userspace GICv3 with KVM 2018-02-09 10:55:32 +00:00
kvm-consts.h
kvm-stub.c
kvm.c
machine.c
Makefile.objs
monitor.c
neon_helper.c
op_addsub.h
op_helper.c
psci.c
trace-events
translate-a64.c target/arm: Add SVE state to TB->FLAGS 2018-02-09 10:55:27 +00:00
translate.c target/arm/translate.c: Fix missing 'break' for TT insns 2018-02-09 10:55:39 +00:00
translate.h target/arm: Add SVE state to TB->FLAGS 2018-02-09 10:55:27 +00:00