154070eaf6
The CXL r3.0 specification allows for there to be no HDM decoders on CXL Host Bridges if they have only a single root port. Instead, all accesses directed to the host bridge (as specified in CXL Fixed Memory Windows) are assumed to be routed to the single root port. Linux currently assumes this implementation choice. So to simplify testing, make QEMU emulation also default to no HDM decoders under these particular circumstances, but provide a hdm_for_passthrough boolean option to have HDM decoders as previously. Technically this is breaking backwards compatibility, but given the only known software stack used with the QEMU emulation is the Linux kernel and this configuration did not work before this change, there are unlikely to be any complaints that it now works. The option is retained to allow testing of software that does allow for these HDM decoders to exist, once someone writes it. Reported-by: Fan Ni <fan.ni@samsung.com> Reviewed-by: Fan Ni <fan.ni@samsung.com> Tested-by: Fan Ni <fan.ni@samsung.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> -- v2: Pick up and fix typo in tag from Fan Ni Message-Id: <20230227153128.8164-3-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
64 lines
1.4 KiB
C
64 lines
1.4 KiB
C
/*
|
|
* QEMU CXL Support
|
|
*
|
|
* Copyright (c) 2020 Intel
|
|
*
|
|
* This work is licensed under the terms of the GNU GPL, version 2. See the
|
|
* COPYING file in the top-level directory.
|
|
*/
|
|
|
|
#ifndef CXL_H
|
|
#define CXL_H
|
|
|
|
|
|
#include "qapi/qapi-types-machine.h"
|
|
#include "qapi/qapi-visit-machine.h"
|
|
#include "hw/pci/pci_host.h"
|
|
#include "cxl_pci.h"
|
|
#include "cxl_component.h"
|
|
#include "cxl_device.h"
|
|
|
|
#define CXL_COMPONENT_REG_BAR_IDX 0
|
|
#define CXL_DEVICE_REG_BAR_IDX 2
|
|
|
|
#define CXL_WINDOW_MAX 10
|
|
|
|
typedef struct PXBDev PXBDev;
|
|
|
|
typedef struct CXLFixedWindow {
|
|
uint64_t size;
|
|
char **targets;
|
|
PXBDev *target_hbs[8];
|
|
uint8_t num_targets;
|
|
uint8_t enc_int_ways;
|
|
uint8_t enc_int_gran;
|
|
/* Todo: XOR based interleaving */
|
|
MemoryRegion mr;
|
|
hwaddr base;
|
|
} CXLFixedWindow;
|
|
|
|
typedef struct CXLState {
|
|
bool is_enabled;
|
|
MemoryRegion host_mr;
|
|
unsigned int next_mr_idx;
|
|
GList *fixed_windows;
|
|
CXLFixedMemoryWindowOptionsList *cfmw_list;
|
|
} CXLState;
|
|
|
|
struct CXLHost {
|
|
PCIHostState parent_obj;
|
|
|
|
CXLComponentState cxl_cstate;
|
|
bool passthrough;
|
|
};
|
|
|
|
#define TYPE_PXB_CXL_HOST "pxb-cxl-host"
|
|
OBJECT_DECLARE_SIMPLE_TYPE(CXLHost, PXB_CXL_HOST)
|
|
|
|
#define TYPE_CXL_USP "cxl-upstream"
|
|
|
|
typedef struct CXLUpstreamPort CXLUpstreamPort;
|
|
DECLARE_INSTANCE_CHECKER(CXLUpstreamPort, CXL_USP, TYPE_CXL_USP)
|
|
CXLComponentState *cxl_usp_to_cstate(CXLUpstreamPort *usp);
|
|
#endif
|