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user
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linux-user: Assert on bad type in thunk_type_align() and thunk_type_size()
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2018-05-24 20:46:54 +02:00 |
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address-spaces.h
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cpu_ldst_template.h
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cputlb: read CPUTLBEntry.addr_write atomically
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2018-10-18 19:46:53 -07:00 |
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cpu_ldst_useronly_template.h
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linux-user: fix 32bit g2h()/h2g()
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2018-08-17 13:56:33 +02:00 |
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cpu_ldst.h
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cputlb: read CPUTLBEntry.addr_write atomically
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2018-10-18 19:46:53 -07:00 |
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cpu-all.h
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tcg: Define and use new tlb_hit() and tlb_hit_page() functions
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2018-07-02 08:02:20 -07:00 |
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cpu-common.h
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Rename cpu_physical_memory_write_rom() to address_space_write_rom()
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2018-12-14 13:30:48 +00:00 |
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cpu-defs.h
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cputlb: Remove tlb_c.pending_flushes
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2018-10-31 12:16:39 +00:00 |
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cputlb.h
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cputlb: Count "partial" and "elided" tlb flushes
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2018-10-31 12:16:30 +00:00 |
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exec-all.h
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exec: introduce tlb_init
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2018-10-18 18:58:10 -07:00 |
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gdbstub.h
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gdbstub: Clarify what gdb_handlesig() is doing
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2018-05-25 10:10:55 +02:00 |
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gen-icount.h
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tcg: Pass tb and index to tcg_gen_exit_tb separately
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2018-06-01 15:15:27 -07:00 |
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helper-gen.h
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helper-head.h
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tcg: Add TCG_CALL_NO_RETURN
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2018-12-26 06:40:24 +11:00 |
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helper-proto.h
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helper-tcg.h
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tcg: Add TCG_CALL_NO_RETURN
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2018-12-26 06:40:24 +11:00 |
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hwaddr.h
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ioport.h
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log.h
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memattrs.h
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memory_ldst_cached.inc.h
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memory_ldst_phys.inc.h
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memory_ldst.inc.h
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memory-internal.h
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tcg: remove tb_lock
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2018-06-15 08:18:48 -10:00 |
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memory.h
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qemu/queue.h: simplify reverse access to QTAILQ
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2019-01-11 15:46:55 +01:00 |
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poison.h
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exec: Add RISC-V GCC poison macro
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2018-12-26 06:40:02 +11:00 |
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ram_addr.h
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COLO: Load dirty pages into SVM's RAM cache firstly
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2018-10-19 11:15:03 +08:00 |
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ramlist.h
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migration: Poison ramblock loops in migration
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2018-06-15 14:40:56 +01:00 |
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semihost.h
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softmmu-semi.h
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target_page.h
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tb-context.h
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tcg: remove tb_lock
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2018-06-15 08:18:48 -10:00 |
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tb-hash.h
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include: move exec/tb-hash-xx.h to qemu/xxhash.h
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2018-12-17 06:04:44 +03:00 |
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tb-lookup.h
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translator.h
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translator: merge max_insns into DisasContextBase
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2018-05-09 10:12:21 -07:00 |
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