qemu-e2k/target/arm
Peter Maydell 792dac309c target-arm: v7M: ignore writes to CONTROL.SPSEL from Thread mode
For v7M, writes to the CONTROL register are only permitted for
privileged code. However even if the code is privileged, the
write must not affect the SPSEL bit in the CONTROL register
if the CPU is in Thread mode (as documented in the pseudocode
for the MSR instruction). Implement this, instead of permitting
SPSEL to be written in all cases.

This was causing mbed applications not to run, because the
RTX RTOS they use relies on this behaviour.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1498820791-8130-1-git-send-email-peter.maydell@linaro.org
2017-07-11 11:21:26 +01:00
..
arch_dump.c
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2017-02-07 18:29:59 +00:00
arm-powerctl.c target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-powerctl.h target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-semi.c
cpu64.c
cpu-qom.h
cpu.c x86 and machine queue, 2017-06-05 2017-06-06 10:00:34 +01:00
cpu.h ARM: KVM: Enable in-kernel timers with user space gic 2017-07-11 11:21:26 +01:00
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c
helper-a64.h
helper.c target-arm: v7M: ignore writes to CONTROL.SPSEL from Thread mode 2017-07-11 11:21:26 +01:00
helper.h
internals.h arm: Move excnames[] array into arm_log_exceptions() 2017-04-20 17:39:17 +01:00
iwmmxt_helper.c
kvm32.c
kvm64.c arm/kvm: Remove trailing newlines from error_report() 2017-04-20 17:39:17 +01:00
kvm_arm.h
kvm-consts.h arm: add trailing ; after MISMATCH_CHECK 2017-02-01 03:37:18 +02:00
kvm-stub.c
kvm.c ARM: KVM: Enable in-kernel timers with user space gic 2017-07-11 11:21:26 +01:00
machine.c arm: add MPU support to M profile CPUs 2017-06-02 11:51:48 +01:00
Makefile.objs
monitor.c
neon_helper.c
op_addsub.h
op_helper.c arm: Add support for M profile CPUs having different MMU index semantics 2017-06-02 11:51:47 +01:00
psci.c shutdown: Add source information to SHUTDOWN and RESET 2017-05-23 13:28:17 +02:00
trace-events
translate-a64.c target/arm: Exit after clearing aarch64 interrupt mask 2017-06-19 11:11:26 -07:00
translate.c target/arm: optimize indirect branches 2017-06-05 09:25:42 -07:00
translate.h target/arm: optimize indirect branches 2017-06-05 09:25:42 -07:00