0b16dcd180
Implement support for nanoMIPS LLWP/SCWP instructions. Beside adding core functionality of these instructions, this patch adds support for availability control via configuration bit XNP. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Dimitrije Nikolic <dnikolic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com> |
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.. | ||
cpu_loop.c | ||
signal.c | ||
sockbits.h | ||
syscall_nr.h | ||
target_cpu.h | ||
target_elf.h | ||
target_fcntl.h | ||
target_signal.h | ||
target_structs.h | ||
target_syscall.h | ||
termbits.h |