f1c2dc7c86
On the sPAPR platform a guest allocates MSI/MSIX vectors via RTAS
hypercalls which return global IRQ numbers to a guest so it only
operates with those and never touches MSIMessage.
Therefore MSIMessage handling is completely hidden in QEMU.
Previously every sPAPR PCI host bridge implemented its own MSI window
to catch msi_notify()/msix_notify() calls from QEMU devices (virtio-pci
or vfio) and route them to the guest via qemu_pulse_irq().
MSIMessage used to be encoded as:
.addr - address within the PHB MSI window;
.data - the device index on PHB plus vector number.
The MSI MR write function translated this MSIMessage to a global IRQ
number and called qemu_pulse_irq().
However the total number of IRQs is not really big (at the moment it is
1024 IRQs starting from 4096) and even 16bit data field of MSIMessage
seems to be enough to store an IRQ number there.
This simplifies MSI handling in sPAPR PHB. Specifically, this does:
1. remove a MSI window from a PHB;
2. add a single memory region for all MSIs to sPAPREnvironment
and spapr_pci_msi_init() to initialize it;
3. encode MSIMessage as:
* .addr - a fixed address of SPAPR_PCI_MSI_WINDOW==0x40000000000ULL;
* .data as an IRQ number.
4. change IRQ allocator to align first IRQ number in a block for MSI.
MSI uses lower bits to specify the vector number so the first IRQ has to
be aligned. MSIX does not need any special allocator though.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
96 lines
2.7 KiB
C
96 lines
2.7 KiB
C
/*
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* QEMU SPAPR PCI BUS definitions
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*
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* Copyright (c) 2011 Alexey Kardashevskiy <aik@au1.ibm.com>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#if !defined(__HW_SPAPR_H__)
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#error Please include spapr.h before this file!
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#endif
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#if !defined(__HW_SPAPR_PCI_H__)
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#define __HW_SPAPR_PCI_H__
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#include "hw/pci/pci.h"
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#include "hw/pci/pci_host.h"
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#include "hw/ppc/xics.h"
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#define SPAPR_MSIX_MAX_DEVS 32
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#define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge"
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#define SPAPR_PCI_HOST_BRIDGE(obj) \
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OBJECT_CHECK(sPAPRPHBState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE)
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typedef struct sPAPRPHBState {
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PCIHostState parent_obj;
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int32_t index;
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uint64_t buid;
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char *dtbusname;
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MemoryRegion memspace, iospace;
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hwaddr mem_win_addr, mem_win_size, io_win_addr, io_win_size;
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MemoryRegion memwindow, iowindow;
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uint32_t dma_liobn;
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uint64_t dma_window_start;
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uint64_t dma_window_size;
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sPAPRTCETable *tcet;
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AddressSpace iommu_as;
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struct spapr_pci_lsi {
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uint32_t irq;
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} lsi_table[PCI_NUM_PINS];
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struct spapr_pci_msi {
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uint32_t config_addr;
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uint32_t irq;
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uint32_t nvec;
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} msi_table[SPAPR_MSIX_MAX_DEVS];
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QLIST_ENTRY(sPAPRPHBState) list;
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} sPAPRPHBState;
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#define SPAPR_PCI_BASE_BUID 0x800000020000000ULL
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#define SPAPR_PCI_WINDOW_BASE 0x10000000000ULL
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#define SPAPR_PCI_WINDOW_SPACING 0x1000000000ULL
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#define SPAPR_PCI_MMIO_WIN_OFF 0xA0000000
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#define SPAPR_PCI_MMIO_WIN_SIZE 0x20000000
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#define SPAPR_PCI_IO_WIN_OFF 0x80000000
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#define SPAPR_PCI_IO_WIN_SIZE 0x10000
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#define SPAPR_PCI_MSI_WINDOW 0x40000000000ULL
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#define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL
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static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin)
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{
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return xics_get_qirq(spapr->icp, phb->lsi_table[pin].irq);
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}
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PCIHostState *spapr_create_phb(sPAPREnvironment *spapr, int index);
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int spapr_populate_pci_dt(sPAPRPHBState *phb,
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uint32_t xics_phandle,
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void *fdt);
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void spapr_pci_msi_init(sPAPREnvironment *spapr, hwaddr addr);
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void spapr_pci_rtas_init(void);
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#endif /* __HW_SPAPR_PCI_H__ */
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