Alexander Graf 36f48d9c78 PPC: Depend behavior of cmp instructions only on instruction encoding ... When running an L=1 cmp instruction on a 64bit PPC CPU with SF off, it still behaves identical to what it does when SF is on. Remove the implicit difference in the code. Also, on most 32bit CPUs we should always treat the compare as 32bit compare, as the CPU will ignore the L bit. This is not true for e500mc, but that's up for a different patch. Reported-by: Torbjorn Granlund <tg@gmplib.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Alexander Graf <agraf@suse.de>		2013-05-08 20:23:20 +02:00
..
cpu-models.c
cpu-models.h
cpu-qom.h	pseries: Fixes and enhancements to L1 cache properties	2013-04-26 23:02:41 +02:00
cpu.h	PPC: Add MMU type for 2.06 with AMR but no TB pages	2013-05-06 17:22:48 +02:00
excp_helper.c
fpu_helper.c	target-ppc: add support for extended mtfsf/mtfsfi forms	2013-04-26 23:02:43 +02:00
helper_regs.h
helper.h	target-ppc: emulate cmpb instruction	2013-04-26 23:02:42 +02:00
int_helper.c	target-ppc: emulate cmpb instruction	2013-04-26 23:02:42 +02:00
kvm_ppc.c
kvm_ppc.h	Enable kvm emulated watchdog	2013-04-26 23:02:40 +02:00
kvm.c	target-ppc: Synchronize VPA state with KVM	2013-04-26 23:02:41 +02:00
machine.c	PPC: Remove env->hreset_excp_prefix	2013-04-26 23:02:40 +02:00
Makefile.objs
mem_helper.c	PPC: Fix dcbz for linux-user on 970	2013-04-26 23:02:42 +02:00
mfrom_table_gen.c
mfrom_table.c
misc_helper.c
mmu_helper.c	PPC: Add MMU type for 2.06 with AMR but no TB pages	2013-05-06 17:22:48 +02:00
mmu-hash32.c
mmu-hash32.h
mmu-hash64.c
mmu-hash64.h
STATUS
timebase_helper.c
translate_init.c	target-ppc: Add read and write of PPR SPR	2013-05-06 17:22:48 +02:00
translate.c	PPC: Depend behavior of cmp instructions only on instruction encoding	2013-05-08 20:23:20 +02:00
user_only_helper.c