qemu-e2k/target
Alvin Chang 0c4e579aac target/riscv: Implement optional CSR mcontext of debug Sdtrig extension
The debug Sdtrig extension defines an CSR "mcontext". This commit
implements its predicate and read/write operations into CSR table.
Its value is reset as 0 when the trigger module is reset.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20231219123244.290935-1-alvinga@andestech.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-02-09 20:40:32 +10:00
..
alpha target/alpha: Use TCG_COND_TSTNE for gen_fold_mzero 2024-02-03 23:43:50 +00:00
arm tests/tcg: Fix multiarch/gdbstub/prot-none.py 2024-02-03 13:31:45 +00:00
avr include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
cris include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
hexagon include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
hppa include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
i386 include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
loongarch include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
m68k target/m68k: Use TCG_COND_TST{EQ,NE} in gen_fcc_cond 2024-02-03 23:43:50 +00:00
microblaze include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
mips include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
nios2 include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
openrisc include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
ppc target/ppc/cpu-models: Rename power5+ and power7+ for new QOM naming rules 2024-02-05 14:21:21 +01:00
riscv target/riscv: Implement optional CSR mcontext of debug Sdtrig extension 2024-02-09 20:40:32 +10:00
rx include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
s390x tcg: Introduce TCG_COND_TST{EQ,NE} 2024-02-08 16:08:42 +00:00
sh4 include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
sparc target/sparc: Use TCG_COND_TSTEQ in gen_op_mulscc 2024-02-03 23:43:50 +00:00
tricore include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
xtensa include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
Kconfig
meson.build
target-common.c