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0c5fbf3b4c
qemu-e2k/target-arm
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Edgar E. Iglesias 0c5fbf3b4c target-arm: Suppress EPD for S2, EL2 and EL3 translations 
Stage-2 translations, EL2 and EL3 regimes don't have the
EPD control.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1442135278-25281-6-git-send-email-edgar.iglesias@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-14 14:39:50 +01:00
..
arm_ldst.h
arm-semi.c target-arm/arm-semi.c: SYS_EXIT on A64 takes a parameter block 2015-09-07 10:39:28 +01:00
cpu64.c
cpu-qom.h target-arm: Refactor CPU affinity handling 2015-09-07 10:39:31 +01:00
cpu.c target-arm: Refactor CPU affinity handling 2015-09-07 10:39:31 +01:00
cpu.h target-arm: Add VTTBR_EL2 2015-09-14 14:39:50 +01:00
crypto_helper.c crypto: move built-in AES implementation into crypto/ 2015-07-07 12:04:13 +02:00
gdbstub64.c
gdbstub.c
helper-a64.c target-arm: Log the target EL when taking exceptions 2015-09-08 17:38:44 +01:00
helper-a64.h
helper.c target-arm: Suppress EPD for S2, EL2 and EL3 translations 2015-09-14 14:39:50 +01:00
helper.h
internals.h target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction 2015-09-07 10:39:28 +01:00
iwmmxt_helper.c
kvm32.c target-arm: Refactor CPU affinity handling 2015-09-07 10:39:31 +01:00
kvm64.c target-arm: Refactor CPU affinity handling 2015-09-07 10:39:31 +01:00
kvm_arm.h Introduce gic_class_name() instead of repeating condition 2015-08-13 11:26:21 +01:00
kvm-consts.h
kvm-stub.c target-arm: kvm: Differentiate registers based on write-back levels 2015-07-21 11:18:45 +01:00
kvm.c target-arm: kvm: Differentiate registers based on write-back levels 2015-07-21 11:18:45 +01:00
machine.c target-arm: kvm: Differentiate registers based on write-back levels 2015-07-21 11:18:45 +01:00
Makefile.objs
neon_helper.c
op_addsub.h
op_helper.c target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3 2015-08-25 15:45:08 +01:00
psci.c
translate-a64.c target-arm: Use tcg_gen_extrh_i64_i32 2015-09-14 14:39:49 +01:00
translate.c target-arm: Handle always condition codes within arm_test_cc 2015-09-14 14:39:47 +01:00
translate.h target-arm: Introduce DisasCompare 2015-09-14 14:39:47 +01:00