215581bdf1
Make sure BQL is held for all interrupt requests. For MTTCG-enabled configurations, handling soft and hard interrupts between vCPUs must be properly locked. By acquiring BQL, make sure all paths triggering an IRQ are synchronized. Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> |
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| .. | ||
| addr.c | ||
| boston.c | ||
| cps.c | ||
| gt64xxx_pci.c | ||
| Makefile.objs | ||
| mips_fulong2e.c | ||
| mips_int.c | ||
| mips_jazz.c | ||
| mips_malta.c | ||
| mips_mipssim.c | ||
| mips_r4k.c | ||