qemu-e2k/target-mips
Leon Alrae 701074a6fc target-mips: fix EntryHi.EHINV being cleared on TLB exception
While implementing TLB invalidation feature we forgot to modify
part of code responsible for updating EntryHi during TLB exception.
Consequently EntryHi.EHINV is unexpectedly cleared on the exception.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-28 11:24:02 +01:00
..
cpu-qom.h target-mips: make cpu-qom.h not target specific 2016-05-19 13:08:05 +02:00
cpu.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
cpu.h target-*: Clean up cpu.h header guards 2016-07-12 16:19:16 +02:00
dsp_helper.c
gdbstub.c target-mips: Implement FCR31's R/W bitmask and related functionalities 2016-06-24 13:43:52 +01:00
helper.c target-mips: fix EntryHi.EHINV being cleared on TLB exception 2016-07-28 11:24:02 +01:00
helper.h target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D> 2016-06-24 13:41:47 +01:00
kvm_mips.h Clean up ill-advised or unusual header guards 2016-07-12 16:20:46 +02:00
kvm.c kvm-irqchip: i386: add hook for add/remove virq 2016-07-21 20:44:19 +03:00
lmi_helper.c
machine.c target-mips: change ASID type to hold more than 8 bits 2016-07-12 09:10:19 +01:00
Makefile.objs
mips-defs.h Clean up ill-advised or unusual header guards 2016-07-12 16:20:46 +02:00
mips-semi.c cpu: move exec-all.h inclusion out of cpu.h 2016-05-19 16:42:29 +02:00
msa_helper.c softfloat: Implement run-time-configurable meaning of signaling NaN bit 2016-06-24 13:40:37 +01:00
op_helper.c Fix confusing argument names in some common functions 2016-07-12 13:06:08 +01:00
TODO
translate_init.c target-mips: enable 10-bit ASIDs in I6400 CPU 2016-07-12 09:10:21 +01:00
translate.c target-mips: support CP0.Config4.AE bit 2016-07-12 09:10:20 +01:00