qemu-e2k/hw/riscv
Sunil V L 0efb12b713 hw/riscv/virt-acpi-build.c: Add AIA support in RINTC
Update the RINTC structure in MADT with AIA related fields.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-ID: <20231218150247.466427-6-sunilvl@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2024-01-10 18:47:46 +10:00
..
boot.c target/riscv: rename ext_icsr to ext_zicsr 2023-11-07 11:02:17 +10:00
Kconfig
meson.build
microchip_pfsoc.c
numa.c
opentitan.c hw/riscv: opentitan: Fixup local variables shadowing 2023-09-29 10:07:20 +02:00
riscv_hart.c
shakti_c.c hw/riscv/shakti_c: Check CPU type in machine_run_board_init() 2024-01-05 16:20:15 +01:00
sifive_e.c riscv: Fix SiFive E CLINT clock frequency 2023-11-22 13:57:19 +10:00
sifive_u.c
spike.c
virt-acpi-build.c hw/riscv/virt-acpi-build.c: Add AIA support in RINTC 2024-01-10 18:47:46 +10:00
virt.c hw/riscv: virt: Make few IMSIC macros and functions public 2024-01-10 18:47:46 +10:00