8035f85ef3
Move RTC devices under the hw/rtc/ subdirectory.
Remove Alistair outdated email address (see commit c22e580c2a).
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20191003230404.19384-10-philmd@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
93 lines
3.0 KiB
C
93 lines
3.0 KiB
C
/*
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* QEMU model of the Xilinx ZynqMP Real Time Clock (RTC).
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*
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* Copyright (c) 2017 Xilinx Inc.
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*
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* Written-by: Alistair Francis
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HW_RTC_XLNX_ZYNQMP_H
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#define HW_RTC_XLNX_ZYNQMP_H
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#include "hw/register.h"
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#include "hw/sysbus.h"
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#define TYPE_XLNX_ZYNQMP_RTC "xlnx-zynmp.rtc"
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#define XLNX_ZYNQMP_RTC(obj) \
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OBJECT_CHECK(XlnxZynqMPRTC, (obj), TYPE_XLNX_ZYNQMP_RTC)
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REG32(SET_TIME_WRITE, 0x0)
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REG32(SET_TIME_READ, 0x4)
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REG32(CALIB_WRITE, 0x8)
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FIELD(CALIB_WRITE, FRACTION_EN, 20, 1)
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FIELD(CALIB_WRITE, FRACTION_DATA, 16, 4)
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FIELD(CALIB_WRITE, MAX_TICK, 0, 16)
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REG32(CALIB_READ, 0xc)
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FIELD(CALIB_READ, FRACTION_EN, 20, 1)
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FIELD(CALIB_READ, FRACTION_DATA, 16, 4)
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FIELD(CALIB_READ, MAX_TICK, 0, 16)
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REG32(CURRENT_TIME, 0x10)
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REG32(CURRENT_TICK, 0x14)
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FIELD(CURRENT_TICK, VALUE, 0, 16)
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REG32(ALARM, 0x18)
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REG32(RTC_INT_STATUS, 0x20)
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FIELD(RTC_INT_STATUS, ALARM, 1, 1)
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FIELD(RTC_INT_STATUS, SECONDS, 0, 1)
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REG32(RTC_INT_MASK, 0x24)
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FIELD(RTC_INT_MASK, ALARM, 1, 1)
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FIELD(RTC_INT_MASK, SECONDS, 0, 1)
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REG32(RTC_INT_EN, 0x28)
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FIELD(RTC_INT_EN, ALARM, 1, 1)
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FIELD(RTC_INT_EN, SECONDS, 0, 1)
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REG32(RTC_INT_DIS, 0x2c)
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FIELD(RTC_INT_DIS, ALARM, 1, 1)
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FIELD(RTC_INT_DIS, SECONDS, 0, 1)
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REG32(ADDR_ERROR, 0x30)
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FIELD(ADDR_ERROR, STATUS, 0, 1)
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REG32(ADDR_ERROR_INT_MASK, 0x34)
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FIELD(ADDR_ERROR_INT_MASK, MASK, 0, 1)
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REG32(ADDR_ERROR_INT_EN, 0x38)
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FIELD(ADDR_ERROR_INT_EN, MASK, 0, 1)
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REG32(ADDR_ERROR_INT_DIS, 0x3c)
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FIELD(ADDR_ERROR_INT_DIS, MASK, 0, 1)
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REG32(CONTROL, 0x40)
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FIELD(CONTROL, BATTERY_DISABLE, 31, 1)
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FIELD(CONTROL, OSC_CNTRL, 24, 4)
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FIELD(CONTROL, SLVERR_ENABLE, 0, 1)
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REG32(SAFETY_CHK, 0x50)
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#define XLNX_ZYNQMP_RTC_R_MAX (R_SAFETY_CHK + 1)
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typedef struct XlnxZynqMPRTC {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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qemu_irq irq_rtc_int;
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qemu_irq irq_addr_error_int;
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uint32_t tick_offset;
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uint32_t regs[XLNX_ZYNQMP_RTC_R_MAX];
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RegisterInfo regs_info[XLNX_ZYNQMP_RTC_R_MAX];
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} XlnxZynqMPRTC;
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#endif
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