256 lines
8.7 KiB
C
256 lines
8.7 KiB
C
/*
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* QTest testcase for Microbit board using the Nordic Semiconductor nRF51 SoC.
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*
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* nRF51:
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* Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
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* Product Spec: http://infocenter.nordicsemi.com/pdf/nRF51822_PS_v3.1.pdf
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*
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* Microbit Board: http://microbit.org/
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*
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* Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
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*
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* This code is licensed under the GPL version 2 or later. See
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* the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "exec/hwaddr.h"
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#include "libqtest.h"
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#include "hw/arm/nrf51.h"
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#include "hw/gpio/nrf51_gpio.h"
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#include "hw/timer/nrf51_timer.h"
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static void test_nrf51_gpio(void)
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{
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size_t i;
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uint32_t actual, expected;
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struct {
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hwaddr addr;
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uint32_t expected;
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} const reset_state[] = {
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{NRF51_GPIO_REG_OUT, 0x00000000}, {NRF51_GPIO_REG_OUTSET, 0x00000000},
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{NRF51_GPIO_REG_OUTCLR, 0x00000000}, {NRF51_GPIO_REG_IN, 0x00000000},
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{NRF51_GPIO_REG_DIR, 0x00000000}, {NRF51_GPIO_REG_DIRSET, 0x00000000},
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{NRF51_GPIO_REG_DIRCLR, 0x00000000}
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};
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/* Check reset state */
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for (i = 0; i < ARRAY_SIZE(reset_state); i++) {
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expected = reset_state[i].expected;
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actual = readl(NRF51_GPIO_BASE + reset_state[i].addr);
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g_assert_cmpuint(actual, ==, expected);
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}
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for (i = 0; i < NRF51_GPIO_PINS; i++) {
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expected = 0x00000002;
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START + i * 4);
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g_assert_cmpuint(actual, ==, expected);
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}
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/* Check dir bit consistency between dir and cnf */
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/* Check set via DIRSET */
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expected = 0x80000001;
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRSET, expected);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
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g_assert_cmpuint(actual, ==, expected);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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/* Check clear via DIRCLR */
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIRCLR, 0x80000001);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
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g_assert_cmpuint(actual, ==, 0x00000000);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01;
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g_assert_cmpuint(actual, ==, 0x00);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
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g_assert_cmpuint(actual, ==, 0x00);
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/* Check set via DIR */
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expected = 0x80000001;
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, expected);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR);
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g_assert_cmpuint(actual, ==, expected);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_END) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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/* Reset DIR */
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_DIR, 0x00000000);
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/* Check Input propagates */
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x00);
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qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x00);
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qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 1);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, -1);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
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/* Check pull-up working */
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qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x00);
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b1110);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
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/* Check pull-down working */
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qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 1);
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0000);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0110);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x00);
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0x02);
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qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, -1);
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/* Check Output propagates */
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irq_intercept_out("/machine/nrf51");
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b0011);
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
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g_assert_true(get_irq(0));
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01);
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g_assert_false(get_irq(0));
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/* Check self-stimulation */
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01);
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x01);
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTCLR, 0x01);
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actual = readl(NRF51_GPIO_BASE + NRF51_GPIO_REG_IN) & 0x01;
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g_assert_cmpuint(actual, ==, 0x00);
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/*
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* Check short-circuit - generates an guest_error which must be checked
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* manually as long as qtest can not scan qemu_log messages
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*/
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01);
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writel(NRF51_GPIO_BASE + NRF51_GPIO_REG_OUTSET, 0x01);
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qtest_set_irq_in(global_qtest, "/machine/nrf51", "unnamed-gpio-in", 0, 0);
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}
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static void timer_task(hwaddr task)
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{
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writel(NRF51_TIMER_BASE + task, NRF51_TRIGGER_TASK);
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}
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static void timer_clear_event(hwaddr event)
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{
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writel(NRF51_TIMER_BASE + event, NRF51_EVENT_CLEAR);
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}
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static void timer_set_bitmode(uint8_t mode)
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{
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writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_BITMODE, mode);
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}
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static void timer_set_prescaler(uint8_t prescaler)
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{
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writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_PRESCALER, prescaler);
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}
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static void timer_set_cc(size_t idx, uint32_t value)
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{
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writel(NRF51_TIMER_BASE + NRF51_TIMER_REG_CC0 + idx * 4, value);
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}
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static void timer_assert_events(uint32_t ev0, uint32_t ev1, uint32_t ev2,
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uint32_t ev3)
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{
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g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_0) == ev0);
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g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_1) == ev1);
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g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_2) == ev2);
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g_assert(readl(NRF51_TIMER_BASE + NRF51_TIMER_EVENT_COMPARE_3) == ev3);
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}
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static void test_nrf51_timer(void)
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{
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uint32_t steps_to_overflow = 408;
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/* Compare Match */
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timer_task(NRF51_TIMER_TASK_STOP);
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timer_task(NRF51_TIMER_TASK_CLEAR);
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timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0);
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timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1);
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timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2);
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timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3);
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timer_set_bitmode(NRF51_TIMER_WIDTH_16); /* 16 MHz Timer */
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timer_set_prescaler(0);
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/* Swept over in first step */
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timer_set_cc(0, 2);
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/* Barely miss on first step */
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timer_set_cc(1, 162);
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/* Spot on on third step */
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timer_set_cc(2, 480);
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timer_assert_events(0, 0, 0, 0);
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timer_task(NRF51_TIMER_TASK_START);
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clock_step(10000);
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timer_assert_events(1, 0, 0, 0);
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/* Swept over on first overflow */
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timer_set_cc(3, 114);
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clock_step(10000);
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timer_assert_events(1, 1, 0, 0);
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clock_step(10000);
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timer_assert_events(1, 1, 1, 0);
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/* Wrap time until internal counter overflows */
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while (steps_to_overflow--) {
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timer_assert_events(1, 1, 1, 0);
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clock_step(10000);
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}
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timer_assert_events(1, 1, 1, 1);
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timer_clear_event(NRF51_TIMER_EVENT_COMPARE_0);
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timer_clear_event(NRF51_TIMER_EVENT_COMPARE_1);
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timer_clear_event(NRF51_TIMER_EVENT_COMPARE_2);
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timer_clear_event(NRF51_TIMER_EVENT_COMPARE_3);
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timer_assert_events(0, 0, 0, 0);
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timer_task(NRF51_TIMER_TASK_STOP);
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/* Test Proposal: Stop/Shutdown */
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/* Test Proposal: Shortcut Compare -> Clear */
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/* Test Proposal: Shortcut Compare -> Stop */
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/* Test Proposal: Counter Mode */
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}
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int main(int argc, char **argv)
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{
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int ret;
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g_test_init(&argc, &argv, NULL);
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global_qtest = qtest_initf("-machine microbit");
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qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio);
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qtest_add_func("/microbit/nrf51/timer", test_nrf51_timer);
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ret = g_test_run();
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qtest_quit(global_qtest);
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return ret;
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}
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