ddf9326184
In general loongarch ipi device, 32bit registers is emulated, however for anysend/mailsend device only 64bit register access is supported. So separate the ipi memory region into two regions, including 32 bits and 64 bits. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220705064901.2353349-2-yangxiaojuan@loongson.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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allwinner-a10-pic.h | ||
arm_gic_common.h | ||
arm_gic.h | ||
arm_gicv3_common.h | ||
arm_gicv3_its_common.h | ||
arm_gicv3.h | ||
armv7m_nvic.h | ||
aspeed_vic.h | ||
bcm2835_ic.h | ||
bcm2836_control.h | ||
exynos4210_combiner.h | ||
exynos4210_gic.h | ||
goldfish_pic.h | ||
heathrow_pic.h | ||
i8259.h | ||
imx_avic.h | ||
imx_gpcv2.h | ||
intc.h | ||
loongarch_extioi.h | ||
loongarch_ipi.h | ||
loongarch_pch_msi.h | ||
loongarch_pch_pic.h | ||
loongson_liointc.h | ||
m68k_irqc.h | ||
mips_gic.h | ||
nios2_vic.h | ||
ppc-uic.h | ||
realview_gic.h | ||
riscv_aclint.h | ||
riscv_aplic.h | ||
riscv_imsic.h | ||
rx_icu.h | ||
sifive_plic.h | ||
xlnx-pmu-iomod-intc.h | ||
xlnx-zynqmp-ipi.h |