qemu-e2k/target
Paolo Bonzini 10cde894b6 target-i386: defer VMEXIT to do_interrupt
Paths through the softmmu code during code generation now need to be audited
to check for double locking of tb_lock.  In particular, VMEXIT can take tb_lock
through cpu_vmexit -> cpu_x86_update_cr4 -> tlb_flush.

To avoid this, split VMEXIT delivery in two parts, similar to what is done with
exceptions.  cpu_vmexit only records the VMEXIT exit code and information, and
cc->do_interrupt can then deliver it when it is safe to take the lock.

Reported-by: Alexander Boettcher <alexander.boettcher@genode-labs.com>
Suggested-by: Richard Henderson <rth@twiddle.net>
Tested-by: Alexander Boettcher <alexander.boettcher@genode-labs.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2017-03-09 10:41:48 +00:00
..
alpha target/alpha: Enable MTTCG by default 2017-02-28 11:41:46 +11:00
arm KVM: do not use sigtimedwait to catch SIGBUS 2017-03-03 16:40:02 +01:00
cris qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
hppa hppa: avoid anonymous unions in designated initializers. 2017-03-04 12:52:01 +00:00
i386 target-i386: defer VMEXIT to do_interrupt 2017-03-09 10:41:48 +00:00
lm32 qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
m68k This is the same as the v3 posted except a re-base and a few extra signoffs 2017-01-16 18:23:02 +00:00
microblaze cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
mips target/mips: hold BQL for timer interrupts 2017-03-09 10:41:48 +00:00
moxie qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
nios2 nios2: avoid anonymous unions in designated initializers. 2017-03-04 14:05:48 +00:00
openrisc target/openrisc: Optimize for r0 being zero 2017-02-14 08:15:00 +11:00
ppc target/ppc: use helper for excp handling 2017-03-06 13:17:28 +11:00
s390x s390x/misc_helper.c: wrap IO instructions in BQL 2017-03-09 10:41:43 +00:00
sh4 monitor: Fix crashes when using HMP commands without CPU 2017-02-21 18:29:01 +00:00
sparc sparc/sparc64: grab BQL before calling cpu_check_irqs 2017-03-09 10:41:38 +00:00
tilegx qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
tricore qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
unicore32 cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
xtensa target/xtensa: hold BQL for interrupt processing 2017-03-09 10:41:43 +00:00