qemu-e2k/target/openrisc
Peter Maydell 71b3254dd2 target/openrisc: Move pic_cpu code into CPU object proper
The openrisc code uses an old style of interrupt handling, where a
separate standalone set of qemu_irqs invoke a function
openrisc_pic_cpu_handler() which signals the interrupt to the CPU
proper by directly calling cpu_interrupt() and cpu_reset_interrupt().
Because CPU objects now inherit (indirectly) from TYPE_DEVICE, they
can have GPIO input lines themselves, and the neater modern way to
implement this is to simply have the CPU object itself provide the
input IRQ lines.

Create GPIO inputs to the OpenRISC CPU object, and make the only user
of cpu_openrisc_pic_init() wire up directly to those instead.

This allows us to delete the hw/openrisc/pic_cpu.c file entirely.

This fixes a trivial memory leak reported by Coverity of the IRQs
allocated in cpu_openrisc_pic_init().

Fixes: Coverity CID 1421934
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stafford Horne <shorne@gmail.com>
Message-id: 20201127225127.14770-4-peter.maydell@linaro.org
2020-12-15 12:04:30 +00:00
..
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu.c target/openrisc: Move pic_cpu code into CPU object proper 2020-12-15 12:04:30 +00:00
cpu.h target/openrisc: Move pic_cpu code into CPU object proper 2020-12-15 12:04:30 +00:00
disas.c meson: target 2020-08-21 06:30:35 -04:00
exception_helper.c target/openrisc: Use env_cpu, env_archcpu 2019-06-10 07:03:42 -07:00
exception.c target/openrisc: Fix LGPL information in the file headers 2019-05-08 17:45:54 +02:00
exception.h Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
fpu_helper.c softfloat: Name compare relation enum 2020-05-19 08:41:45 -07:00
gdbstub.c gdbstub: extend GByteArray to read register helpers 2020-03-17 17:38:38 +00:00
helper.h target/openrisc: Implement unordered fp comparisons 2019-09-04 12:57:59 -07:00
insns.decode target/openrisc: Implement l.adrp 2019-09-04 12:59:00 -07:00
interrupt_helper.c target/openrisc: Fix LGPL version number 2019-01-30 11:01:36 +01:00
interrupt.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
machine.c target/openrisc: Implement move to/from FPCSR 2019-09-04 12:58:55 -07:00
meson.build meson: target 2020-08-21 06:30:35 -04:00
mmu.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
sys_helper.c target/openrisc: Remove dead code attempting to check "is timer disabled" 2020-11-17 12:56:32 +00:00
translate.c meson: target 2020-08-21 06:30:35 -04:00