qemu-e2k/target-arm
Davorin Mista 1424ca8d43 target-arm: Implement AArch64 OSLAR/OSLSR_EL1 sysregs
Added oslar_write function to OSLAR_EL1 sysreg, using a status variable
in ARMCPUState.cp15 struct (oslsr_el1). This variable is also linked
to the newly added read-only OSLSR_EL1 register.

Linux reads from this register during its suspend/resume procedure.

Signed-off-by: Davorin Mista <davorin.mista@aggios.com>
[PMM: folded a long line and tweaked a comment]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-10-16 11:14:53 +01:00
..
arm_ldst.h
arm-semi.c target-arm/arm-semi.c: SYS_EXIT on A64 takes a parameter block 2015-09-07 10:39:28 +01:00
cpu64.c target-arm: Fix REVIDR reset value 2015-06-15 18:06:08 +01:00
cpu-qom.h target-arm: Refactor CPU affinity handling 2015-09-07 10:39:31 +01:00
cpu.c qdev: Protect device-list-properties against broken devices 2015-10-09 15:25:57 +02:00
cpu.h target-arm: Implement AArch64 OSLAR/OSLSR_EL1 sysregs 2015-10-16 11:14:53 +01:00
crypto_helper.c crypto: move built-in AES implementation into crypto/ 2015-07-07 12:04:13 +02:00
gdbstub64.c
gdbstub.c
helper-a64.c target-arm: Use new revbit functions 2015-09-15 07:45:33 -07:00
helper-a64.h
helper.c target-arm: Implement AArch64 OSLAR/OSLSR_EL1 sysregs 2015-10-16 11:14:53 +01:00
helper.h target-arm: Split DISAS_YIELD from DISAS_WFE 2015-07-06 10:05:44 +01:00
internals.h target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction 2015-09-07 10:39:28 +01:00
iwmmxt_helper.c
kvm32.c target-arm: Refactor CPU affinity handling 2015-09-07 10:39:31 +01:00
kvm64.c target-arm: Refactor CPU affinity handling 2015-09-07 10:39:31 +01:00
kvm_arm.h hw/intc: Initial implementation of vGICv3 2015-09-24 01:29:37 +01:00
kvm-consts.h target-arm/kvm64: Add cortex-a53 cpu support 2015-06-15 18:06:08 +01:00
kvm-stub.c target-arm: kvm: Differentiate registers based on write-back levels 2015-07-21 11:18:45 +01:00
kvm.c arm_kvm: Do not assume particular GIC type in kvm_arch_irqchip_create() 2015-09-24 01:29:37 +01:00
machine.c hw/intc: Initial implementation of vGICv3 2015-09-24 01:29:37 +01:00
Makefile.objs target-arm: add emulation of PSCI calls for system emulation 2014-10-24 12:19:13 +01:00
neon_helper.c
op_addsub.h
op_helper.c target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3 2015-08-25 15:45:08 +01:00
psci.c target-arm: Use the kernel's idea of MPIDR if we're using KVM 2015-06-15 18:06:09 +01:00
translate-a64.c target-arm: Break the TB after ISB to execute self-modified code correctly 2015-10-16 11:14:52 +01:00
translate.c target-arm: Break the TB after ISB to execute self-modified code correctly 2015-10-16 11:14:52 +01:00
translate.h tcg: Remove gen_intermediate_code_pc 2015-10-07 20:36:52 +11:00