222a3336ec
This adds support for CPUID_EXT_SSE41, CPUID_EXT_SSE42, CPUID_EXT_POPCNT extensions. Most instructions haven't been tested yet. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5411 c046a42c-6fe2-441c-8c8c-71466251a162
58 lines
1.8 KiB
C
58 lines
1.8 KiB
C
/* See if various MMX/SSE SSSE3 instructions give expected results */
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#include <stdio.h>
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#include <string.h>
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#include <stdint.h>
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int main(int argc, char *argv[]) {
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char hello[16];
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const char ehlo[8] = "EHLO ";
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uint64_t mask = 0x8080800302020001;
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uint64_t a = 0x0000000000090007;
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uint64_t b = 0x0000000000000000;
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uint32_t c;
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uint16_t d;
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const char e[16] = "LLOaaaaaaaaaaaaa";
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const char f[16] = "aaaaaaaaaaaaaaHE";
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/* pshufb mm1/xmm1, mm2/xmm2 */
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asm volatile ("movq (%0), %%mm0" : : "r" (ehlo) : "mm0", "mm1");
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asm volatile ("movq %0, %%mm1" : : "m" (mask));
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asm volatile ("pshufb %mm1, %mm0");
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asm volatile ("movq %%mm0, %0" : "=m" (hello));
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printf("%s\n", hello);
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/* pshufb mm1/xmm1, m64/m128 */
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asm volatile ("movq (%0), %%mm0" : : "r" (ehlo) : "mm0");
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asm volatile ("pshufb %0, %%mm0" : : "m" (mask));
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asm volatile ("movq %%mm0, %0" : "=m" (hello));
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printf("%s\n", hello);
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/* psubsw mm1/xmm1, m64/m128 */
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asm volatile ("movq %0, %%mm0" : : "r" (a) : "mm0");
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asm volatile ("phsubsw %0, %%mm0" : : "m" (b));
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asm volatile ("movq %%mm0, %0" : "=m" (a));
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printf("%i - %i = %i\n", 9, 7, -(int16_t) a);
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/* palignr mm1/xmm1, m64/m128, imm8 */
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asm volatile ("movdqa (%0), %%xmm0" : : "r" (e) : "xmm0");
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asm volatile ("palignr $14, (%0), %%xmm0" : : "r" (f));
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asm volatile ("movdqa %%xmm0, (%0)" : : "r" (hello));
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printf("%5.5s\n", hello);
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#if 1 /* SSE4 */
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/* popcnt r64, r/m64 */
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asm volatile ("movq $0x8421000010009c63, %%rax" : : : "rax");
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asm volatile ("popcnt %%ax, %%dx" : : : "dx");
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asm volatile ("popcnt %%eax, %%ecx" : : : "ecx");
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asm volatile ("popcnt %rax, %rax");
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asm volatile ("movq %%rax, %0" : "=m" (a));
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asm volatile ("movl %%ecx, %0" : "=m" (c));
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asm volatile ("movw %%dx, %0" : "=m" (d));
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printf("%i = %i\n%i = %i = %i\n", 13, (int) a, 9, c, d + 1);
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#endif
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return 0;
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}
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