qemu-e2k/fpu
Richard Henderson 722460652b fpu: Handle m68k extended precision denormals properly
Motorola treats denormals with explicit integer bit set as
having unbiased exponent 0, unlike Intel which treats it as
having unbiased exponent 1 (more like all other IEEE formats
that have no explicit integer bit).

Add a flag on FloatFmt to differentiate the behaviour.

Reported-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-09-16 14:57:16 +00:00
..
meson.build meson: Split out fpu/meson.build 2021-06-11 09:26:28 -07:00
softfloat-parts-addsub.c.inc softfloat: Move addsub_floats to softfloat-parts.c.inc 2021-05-16 07:13:51 -05:00
softfloat-parts.c.inc fpu: Handle m68k extended precision denormals properly 2023-09-16 14:57:16 +00:00
softfloat-specialize.c.inc * Fixes for s390x floating point vector instructions 2022-07-20 14:13:32 +01:00
softfloat.c fpu: Handle m68k extended precision denormals properly 2023-09-16 14:57:16 +00:00