79e0793614
Calculating default node-ids for CPUs in possible_cpu_arch_ids()
is rather fragile since defaults calculation uses nb_numa_nodes but
callback might be potentially called early before all -numa CLI
options are parsed, which would lead to cpus assigned only upto
nb_numa_nodes at the time possible_cpu_arch_ids() is called.
Issue was introduced by
(7c88e65
numa: mirror cpu to node mapping in MachineState::possible_cpus)
and for example CLI:
-smp 4 -numa node,cpus=0 -numa node
would set props.node-id in possible_cpus array for every non
explicitly mapped CPU to the first node.
Issue is not visible to guest nor to mgmt interface due to
1) implictly mapped cpus are forced to the first node in
case of partial mapping
2) in case of default mapping possible_cpu_arch_ids() is
called after all -numa options are parsed (resulting
in correct mapping).
However it's fragile to rely on late execution of
possible_cpu_arch_ids(), therefore add machine specific
callback that returns node-id for CPU and use it to calculate/
set defaults at machine_numa_finish_init() time when all -numa
options are parsed.
Reported-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <1496314408-163972-1-git-send-email-imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
811 lines
23 KiB
C
811 lines
23 KiB
C
/*
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* QEMU Machine
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*
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* Copyright (C) 2014 Red Hat Inc
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*
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* Authors:
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* Marcel Apfelbaum <marcel.a@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "hw/boards.h"
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#include "qapi/error.h"
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#include "qapi-visit.h"
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#include "qapi/visitor.h"
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#include "hw/sysbus.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/numa.h"
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#include "qemu/error-report.h"
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#include "qemu/cutils.h"
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#include "sysemu/numa.h"
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#include "sysemu/qtest.h"
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static char *machine_get_accel(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->accel);
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}
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static void machine_set_accel(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->accel);
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ms->accel = g_strdup(value);
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}
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static void machine_set_kernel_irqchip(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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Error *err = NULL;
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MachineState *ms = MACHINE(obj);
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OnOffSplit mode;
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visit_type_OnOffSplit(v, name, &mode, &err);
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if (err) {
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error_propagate(errp, err);
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return;
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} else {
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switch (mode) {
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case ON_OFF_SPLIT_ON:
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ms->kernel_irqchip_allowed = true;
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ms->kernel_irqchip_required = true;
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ms->kernel_irqchip_split = false;
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break;
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case ON_OFF_SPLIT_OFF:
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ms->kernel_irqchip_allowed = false;
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ms->kernel_irqchip_required = false;
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ms->kernel_irqchip_split = false;
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break;
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case ON_OFF_SPLIT_SPLIT:
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ms->kernel_irqchip_allowed = true;
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ms->kernel_irqchip_required = true;
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ms->kernel_irqchip_split = true;
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break;
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default:
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/* The value was checked in visit_type_OnOffSplit() above. If
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* we get here, then something is wrong in QEMU.
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*/
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abort();
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}
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}
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}
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static void machine_get_kvm_shadow_mem(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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int64_t value = ms->kvm_shadow_mem;
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visit_type_int(v, name, &value, errp);
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}
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static void machine_set_kvm_shadow_mem(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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Error *error = NULL;
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int64_t value;
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visit_type_int(v, name, &value, &error);
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if (error) {
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error_propagate(errp, error);
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return;
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}
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ms->kvm_shadow_mem = value;
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}
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static char *machine_get_kernel(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->kernel_filename);
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}
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static void machine_set_kernel(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->kernel_filename);
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ms->kernel_filename = g_strdup(value);
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}
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static char *machine_get_initrd(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->initrd_filename);
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}
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static void machine_set_initrd(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->initrd_filename);
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ms->initrd_filename = g_strdup(value);
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}
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static char *machine_get_append(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->kernel_cmdline);
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}
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static void machine_set_append(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->kernel_cmdline);
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ms->kernel_cmdline = g_strdup(value);
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}
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static char *machine_get_dtb(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->dtb);
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}
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static void machine_set_dtb(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->dtb);
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ms->dtb = g_strdup(value);
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}
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static char *machine_get_dumpdtb(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->dumpdtb);
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}
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static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->dumpdtb);
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ms->dumpdtb = g_strdup(value);
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}
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static void machine_get_phandle_start(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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int64_t value = ms->phandle_start;
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visit_type_int(v, name, &value, errp);
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}
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static void machine_set_phandle_start(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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Error *error = NULL;
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int64_t value;
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visit_type_int(v, name, &value, &error);
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if (error) {
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error_propagate(errp, error);
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return;
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}
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ms->phandle_start = value;
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}
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static char *machine_get_dt_compatible(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->dt_compatible);
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}
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static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->dt_compatible);
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ms->dt_compatible = g_strdup(value);
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}
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static bool machine_get_dump_guest_core(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return ms->dump_guest_core;
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}
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static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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ms->dump_guest_core = value;
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}
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static bool machine_get_mem_merge(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return ms->mem_merge;
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}
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static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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ms->mem_merge = value;
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}
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static bool machine_get_usb(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return ms->usb;
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}
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static void machine_set_usb(Object *obj, bool value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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ms->usb = value;
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ms->usb_disabled = !value;
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}
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static bool machine_get_graphics(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return ms->enable_graphics;
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}
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static void machine_set_graphics(Object *obj, bool value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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ms->enable_graphics = value;
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}
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static bool machine_get_igd_gfx_passthru(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return ms->igd_gfx_passthru;
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}
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static void machine_set_igd_gfx_passthru(Object *obj, bool value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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ms->igd_gfx_passthru = value;
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}
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static char *machine_get_firmware(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return g_strdup(ms->firmware);
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}
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static void machine_set_firmware(Object *obj, const char *value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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g_free(ms->firmware);
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ms->firmware = g_strdup(value);
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}
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static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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ms->suppress_vmdesc = value;
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}
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static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return ms->suppress_vmdesc;
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}
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static void machine_set_enforce_config_section(Object *obj, bool value,
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Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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ms->enforce_config_section = value;
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}
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static bool machine_get_enforce_config_section(Object *obj, Error **errp)
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{
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MachineState *ms = MACHINE(obj);
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return ms->enforce_config_section;
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}
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static void error_on_sysbus_device(SysBusDevice *sbdev, void *opaque)
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{
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error_report("Option '-device %s' cannot be handled by this machine",
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object_class_get_name(object_get_class(OBJECT(sbdev))));
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exit(1);
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}
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static void machine_init_notify(Notifier *notifier, void *data)
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{
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Object *machine = qdev_get_machine();
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ObjectClass *oc = object_get_class(machine);
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MachineClass *mc = MACHINE_CLASS(oc);
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if (mc->has_dynamic_sysbus) {
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/* Our machine can handle dynamic sysbus devices, we're all good */
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return;
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}
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/*
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* Loop through all dynamically created devices and check whether there
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* are sysbus devices among them. If there are, error out.
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*/
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foreach_dynamic_sysbus_device(error_on_sysbus_device, NULL);
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}
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HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
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{
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int i;
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Object *cpu;
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HotpluggableCPUList *head = NULL;
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const char *cpu_type;
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cpu = machine->possible_cpus->cpus[0].cpu;
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assert(cpu); /* Boot cpu is always present */
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cpu_type = object_get_typename(cpu);
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for (i = 0; i < machine->possible_cpus->len; i++) {
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HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1);
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HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
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cpu_item->type = g_strdup(cpu_type);
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cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
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cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
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sizeof(*cpu_item->props));
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cpu = machine->possible_cpus->cpus[i].cpu;
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if (cpu) {
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cpu_item->has_qom_path = true;
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cpu_item->qom_path = object_get_canonical_path(cpu);
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}
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list_item->value = cpu_item;
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list_item->next = head;
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head = list_item;
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}
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return head;
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}
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/**
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* machine_set_cpu_numa_node:
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* @machine: machine object to modify
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* @props: specifies which cpu objects to assign to
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* numa node specified by @props.node_id
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* @errp: if an error occurs, a pointer to an area to store the error
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*
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* Associate NUMA node specified by @props.node_id with cpu slots that
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* match socket/core/thread-ids specified by @props. It's recommended to use
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* query-hotpluggable-cpus.props values to specify affected cpu slots,
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* which would lead to exact 1:1 mapping of cpu slots to NUMA node.
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*
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* However for CLI convenience it's possible to pass in subset of properties,
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* which would affect all cpu slots that match it.
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* Ex for pc machine:
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* -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
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* -numa cpu,node-id=0,socket_id=0 \
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* -numa cpu,node-id=1,socket_id=1
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* will assign all child cores of socket 0 to node 0 and
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* of socket 1 to node 1.
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*
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* On attempt of reassigning (already assigned) cpu slot to another NUMA node,
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* return error.
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* Empty subset is disallowed and function will return with error in this case.
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*/
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void machine_set_cpu_numa_node(MachineState *machine,
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const CpuInstanceProperties *props, Error **errp)
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{
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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bool match = false;
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int i;
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if (!mc->possible_cpu_arch_ids) {
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error_setg(errp, "mapping of CPUs to NUMA node is not supported");
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return;
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}
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/* disabling node mapping is not supported, forbid it */
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assert(props->has_node_id);
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/* force board to initialize possible_cpus if it hasn't been done yet */
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mc->possible_cpu_arch_ids(machine);
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for (i = 0; i < machine->possible_cpus->len; i++) {
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CPUArchId *slot = &machine->possible_cpus->cpus[i];
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/* reject unsupported by board properties */
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if (props->has_thread_id && !slot->props.has_thread_id) {
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error_setg(errp, "thread-id is not supported");
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return;
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}
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if (props->has_core_id && !slot->props.has_core_id) {
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error_setg(errp, "core-id is not supported");
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return;
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}
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if (props->has_socket_id && !slot->props.has_socket_id) {
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error_setg(errp, "socket-id is not supported");
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return;
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}
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/* skip slots with explicit mismatch */
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if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
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continue;
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}
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if (props->has_core_id && props->core_id != slot->props.core_id) {
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continue;
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}
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if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
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continue;
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}
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|
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/* reject assignment if slot is already assigned, for compatibility
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* of legacy cpu_index mapping with SPAPR core based mapping do not
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* error out if cpu thread and matched core have the same node-id */
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if (slot->props.has_node_id &&
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slot->props.node_id != props->node_id) {
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error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
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slot->props.node_id);
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return;
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}
|
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|
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/* assign slot to node as it's matched '-numa cpu' key */
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match = true;
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slot->props.node_id = props->node_id;
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slot->props.has_node_id = props->has_node_id;
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}
|
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if (!match) {
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error_setg(errp, "no match found");
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}
|
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}
|
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|
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static void machine_class_init(ObjectClass *oc, void *data)
|
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{
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
|
|
/* Default 128 MB as guest ram size */
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|
mc->default_ram_size = 128 * M_BYTE;
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mc->rom_file_has_mr = true;
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|
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/* numa node memory size aligned on 8MB by default.
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* On Linux, each node's border has to be 8MB aligned
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*/
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mc->numa_mem_align_shift = 23;
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mc->numa_auto_assign_ram = numa_default_auto_assign_ram;
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object_class_property_add_str(oc, "accel",
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|
machine_get_accel, machine_set_accel, &error_abort);
|
|
object_class_property_set_description(oc, "accel",
|
|
"Accelerator list", &error_abort);
|
|
|
|
object_class_property_add(oc, "kernel-irqchip", "OnOffSplit",
|
|
NULL, machine_set_kernel_irqchip,
|
|
NULL, NULL, &error_abort);
|
|
object_class_property_set_description(oc, "kernel-irqchip",
|
|
"Configure KVM in-kernel irqchip", &error_abort);
|
|
|
|
object_class_property_add(oc, "kvm-shadow-mem", "int",
|
|
machine_get_kvm_shadow_mem, machine_set_kvm_shadow_mem,
|
|
NULL, NULL, &error_abort);
|
|
object_class_property_set_description(oc, "kvm-shadow-mem",
|
|
"KVM shadow MMU size", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "kernel",
|
|
machine_get_kernel, machine_set_kernel, &error_abort);
|
|
object_class_property_set_description(oc, "kernel",
|
|
"Linux kernel image file", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "initrd",
|
|
machine_get_initrd, machine_set_initrd, &error_abort);
|
|
object_class_property_set_description(oc, "initrd",
|
|
"Linux initial ramdisk file", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "append",
|
|
machine_get_append, machine_set_append, &error_abort);
|
|
object_class_property_set_description(oc, "append",
|
|
"Linux kernel command line", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "dtb",
|
|
machine_get_dtb, machine_set_dtb, &error_abort);
|
|
object_class_property_set_description(oc, "dtb",
|
|
"Linux kernel device tree file", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "dumpdtb",
|
|
machine_get_dumpdtb, machine_set_dumpdtb, &error_abort);
|
|
object_class_property_set_description(oc, "dumpdtb",
|
|
"Dump current dtb to a file and quit", &error_abort);
|
|
|
|
object_class_property_add(oc, "phandle-start", "int",
|
|
machine_get_phandle_start, machine_set_phandle_start,
|
|
NULL, NULL, &error_abort);
|
|
object_class_property_set_description(oc, "phandle-start",
|
|
"The first phandle ID we may generate dynamically", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "dt-compatible",
|
|
machine_get_dt_compatible, machine_set_dt_compatible, &error_abort);
|
|
object_class_property_set_description(oc, "dt-compatible",
|
|
"Overrides the \"compatible\" property of the dt root node",
|
|
&error_abort);
|
|
|
|
object_class_property_add_bool(oc, "dump-guest-core",
|
|
machine_get_dump_guest_core, machine_set_dump_guest_core, &error_abort);
|
|
object_class_property_set_description(oc, "dump-guest-core",
|
|
"Include guest memory in a core dump", &error_abort);
|
|
|
|
object_class_property_add_bool(oc, "mem-merge",
|
|
machine_get_mem_merge, machine_set_mem_merge, &error_abort);
|
|
object_class_property_set_description(oc, "mem-merge",
|
|
"Enable/disable memory merge support", &error_abort);
|
|
|
|
object_class_property_add_bool(oc, "usb",
|
|
machine_get_usb, machine_set_usb, &error_abort);
|
|
object_class_property_set_description(oc, "usb",
|
|
"Set on/off to enable/disable usb", &error_abort);
|
|
|
|
object_class_property_add_bool(oc, "graphics",
|
|
machine_get_graphics, machine_set_graphics, &error_abort);
|
|
object_class_property_set_description(oc, "graphics",
|
|
"Set on/off to enable/disable graphics emulation", &error_abort);
|
|
|
|
object_class_property_add_bool(oc, "igd-passthru",
|
|
machine_get_igd_gfx_passthru, machine_set_igd_gfx_passthru,
|
|
&error_abort);
|
|
object_class_property_set_description(oc, "igd-passthru",
|
|
"Set on/off to enable/disable igd passthrou", &error_abort);
|
|
|
|
object_class_property_add_str(oc, "firmware",
|
|
machine_get_firmware, machine_set_firmware,
|
|
&error_abort);
|
|
object_class_property_set_description(oc, "firmware",
|
|
"Firmware image", &error_abort);
|
|
|
|
object_class_property_add_bool(oc, "suppress-vmdesc",
|
|
machine_get_suppress_vmdesc, machine_set_suppress_vmdesc,
|
|
&error_abort);
|
|
object_class_property_set_description(oc, "suppress-vmdesc",
|
|
"Set on to disable self-describing migration", &error_abort);
|
|
|
|
object_class_property_add_bool(oc, "enforce-config-section",
|
|
machine_get_enforce_config_section, machine_set_enforce_config_section,
|
|
&error_abort);
|
|
object_class_property_set_description(oc, "enforce-config-section",
|
|
"Set on to enforce configuration section migration", &error_abort);
|
|
}
|
|
|
|
static void machine_class_base_init(ObjectClass *oc, void *data)
|
|
{
|
|
if (!object_class_is_abstract(oc)) {
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
const char *cname = object_class_get_name(oc);
|
|
assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
|
|
mc->name = g_strndup(cname,
|
|
strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
|
|
}
|
|
}
|
|
|
|
static void machine_initfn(Object *obj)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
ms->kernel_irqchip_allowed = true;
|
|
ms->kvm_shadow_mem = -1;
|
|
ms->dump_guest_core = true;
|
|
ms->mem_merge = true;
|
|
ms->enable_graphics = true;
|
|
|
|
/* Register notifier when init is done for sysbus sanity checks */
|
|
ms->sysbus_notifier.notify = machine_init_notify;
|
|
qemu_add_machine_init_done_notifier(&ms->sysbus_notifier);
|
|
}
|
|
|
|
static void machine_finalize(Object *obj)
|
|
{
|
|
MachineState *ms = MACHINE(obj);
|
|
|
|
g_free(ms->accel);
|
|
g_free(ms->kernel_filename);
|
|
g_free(ms->initrd_filename);
|
|
g_free(ms->kernel_cmdline);
|
|
g_free(ms->dtb);
|
|
g_free(ms->dumpdtb);
|
|
g_free(ms->dt_compatible);
|
|
g_free(ms->firmware);
|
|
}
|
|
|
|
bool machine_usb(MachineState *machine)
|
|
{
|
|
return machine->usb;
|
|
}
|
|
|
|
bool machine_kernel_irqchip_allowed(MachineState *machine)
|
|
{
|
|
return machine->kernel_irqchip_allowed;
|
|
}
|
|
|
|
bool machine_kernel_irqchip_required(MachineState *machine)
|
|
{
|
|
return machine->kernel_irqchip_required;
|
|
}
|
|
|
|
bool machine_kernel_irqchip_split(MachineState *machine)
|
|
{
|
|
return machine->kernel_irqchip_split;
|
|
}
|
|
|
|
int machine_kvm_shadow_mem(MachineState *machine)
|
|
{
|
|
return machine->kvm_shadow_mem;
|
|
}
|
|
|
|
int machine_phandle_start(MachineState *machine)
|
|
{
|
|
return machine->phandle_start;
|
|
}
|
|
|
|
bool machine_dump_guest_core(MachineState *machine)
|
|
{
|
|
return machine->dump_guest_core;
|
|
}
|
|
|
|
bool machine_mem_merge(MachineState *machine)
|
|
{
|
|
return machine->mem_merge;
|
|
}
|
|
|
|
static char *cpu_slot_to_string(const CPUArchId *cpu)
|
|
{
|
|
GString *s = g_string_new(NULL);
|
|
if (cpu->props.has_socket_id) {
|
|
g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
|
|
}
|
|
if (cpu->props.has_core_id) {
|
|
if (s->len) {
|
|
g_string_append_printf(s, ", ");
|
|
}
|
|
g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
|
|
}
|
|
if (cpu->props.has_thread_id) {
|
|
if (s->len) {
|
|
g_string_append_printf(s, ", ");
|
|
}
|
|
g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
|
|
}
|
|
return g_string_free(s, false);
|
|
}
|
|
|
|
static void machine_numa_finish_init(MachineState *machine)
|
|
{
|
|
int i;
|
|
bool default_mapping;
|
|
GString *s = g_string_new(NULL);
|
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
|
const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
|
|
|
|
assert(nb_numa_nodes);
|
|
for (i = 0; i < possible_cpus->len; i++) {
|
|
if (possible_cpus->cpus[i].props.has_node_id) {
|
|
break;
|
|
}
|
|
}
|
|
default_mapping = (i == possible_cpus->len);
|
|
|
|
for (i = 0; i < possible_cpus->len; i++) {
|
|
const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
|
|
|
|
if (!cpu_slot->props.has_node_id) {
|
|
/* fetch default mapping from board and enable it */
|
|
CpuInstanceProperties props = cpu_slot->props;
|
|
|
|
props.node_id = mc->get_default_cpu_node_id(machine, i);
|
|
if (!default_mapping) {
|
|
/* record slots with not set mapping,
|
|
* TODO: make it hard error in future */
|
|
char *cpu_str = cpu_slot_to_string(cpu_slot);
|
|
g_string_append_printf(s, "%sCPU %d [%s]",
|
|
s->len ? ", " : "", i, cpu_str);
|
|
g_free(cpu_str);
|
|
|
|
/* non mapped cpus used to fallback to node 0 */
|
|
props.node_id = 0;
|
|
}
|
|
|
|
props.has_node_id = true;
|
|
machine_set_cpu_numa_node(machine, &props, &error_fatal);
|
|
}
|
|
}
|
|
if (s->len && !qtest_enabled()) {
|
|
warn_report("CPU(s) not present in any NUMA nodes: %s",
|
|
s->str);
|
|
warn_report("All CPU(s) up to maxcpus should be described "
|
|
"in NUMA config, ability to start up with partial NUMA "
|
|
"mappings is obsoleted and will be removed in future");
|
|
}
|
|
g_string_free(s, true);
|
|
}
|
|
|
|
void machine_run_board_init(MachineState *machine)
|
|
{
|
|
MachineClass *machine_class = MACHINE_GET_CLASS(machine);
|
|
|
|
if (nb_numa_nodes) {
|
|
machine_numa_finish_init(machine);
|
|
}
|
|
machine_class->init(machine);
|
|
}
|
|
|
|
static void machine_class_finalize(ObjectClass *klass, void *data)
|
|
{
|
|
MachineClass *mc = MACHINE_CLASS(klass);
|
|
|
|
if (mc->compat_props) {
|
|
g_array_free(mc->compat_props, true);
|
|
}
|
|
g_free(mc->name);
|
|
}
|
|
|
|
void machine_register_compat_props(MachineState *machine)
|
|
{
|
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
|
int i;
|
|
GlobalProperty *p;
|
|
|
|
if (!mc->compat_props) {
|
|
return;
|
|
}
|
|
|
|
for (i = 0; i < mc->compat_props->len; i++) {
|
|
p = g_array_index(mc->compat_props, GlobalProperty *, i);
|
|
/* Machine compat_props must never cause errors: */
|
|
p->errp = &error_abort;
|
|
qdev_prop_register_global(p);
|
|
}
|
|
}
|
|
|
|
static const TypeInfo machine_info = {
|
|
.name = TYPE_MACHINE,
|
|
.parent = TYPE_OBJECT,
|
|
.abstract = true,
|
|
.class_size = sizeof(MachineClass),
|
|
.class_init = machine_class_init,
|
|
.class_base_init = machine_class_base_init,
|
|
.class_finalize = machine_class_finalize,
|
|
.instance_size = sizeof(MachineState),
|
|
.instance_init = machine_initfn,
|
|
.instance_finalize = machine_finalize,
|
|
};
|
|
|
|
static void machine_register_types(void)
|
|
{
|
|
type_register_static(&machine_info);
|
|
}
|
|
|
|
type_init(machine_register_types)
|