qemu-e2k/include/hw/riscv/spike.h

55 lines
1.4 KiB
C

/*
* Spike machine interface
*
* Copyright (c) 2017 SiFive, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2 or later, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef HW_RISCV_SPIKE_H
#define HW_RISCV_SPIKE_H
#include "hw/riscv/riscv_hart.h"
#include "hw/sysbus.h"
#define SPIKE_CPUS_MAX 8
#define SPIKE_SOCKETS_MAX 8
#define TYPE_SPIKE_MACHINE MACHINE_TYPE_NAME("spike")
#define SPIKE_MACHINE(obj) \
OBJECT_CHECK(SpikeState, (obj), TYPE_SPIKE_MACHINE)
typedef struct {
/*< private >*/
MachineState parent;
/*< public >*/
RISCVHartArrayState soc[SPIKE_SOCKETS_MAX];
void *fdt;
int fdt_size;
} SpikeState;
enum {
SPIKE_MROM,
SPIKE_CLINT,
SPIKE_DRAM
};
#if defined(TARGET_RISCV32)
#define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_BASE32
#elif defined(TARGET_RISCV64)
#define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_BASE64
#endif
#endif