qemu-e2k/linux-user/ppc
Suraj Jitindar Singh 5d62725b2f target/ppc: Implement the VTB for HV access
The virtual timebase register (VTB) is a 64-bit register which
increments at the same rate as the timebase register, present on POWER8
and later processors.

The register is able to be read/written by the hypervisor and read by
the supervisor. All other accesses are illegal.

Currently the VTB is just an alias for the timebase (TB) register.

Implement the VTB so that is can be read/written independent of the TB.
Make use of the existing method for accessing timebase facilities where
by the compensation is stored and used to compute the value on reads/is
updated on writes.

Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
[ clg: rebased on current ppc tree ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20191128134700.16091-2-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-12-17 10:39:48 +11:00
..
cpu_loop.c target/ppc: Implement the VTB for HV access 2019-12-17 10:39:48 +11:00
signal.c target/ppc: fix signal delivery for ppc64abi32 2019-09-26 19:00:53 +01:00
sockbits.h
syscall_nr.h Supply missing header guards 2019-06-12 13:20:21 +02:00
target_cpu.h linux-user: Introduce cpu_clone_regs_parent 2019-11-06 13:43:25 +01:00
target_elf.h linux-user: set default PPC64 CPU 2019-06-24 23:10:36 +02:00
target_fcntl.h linux-user: move ppc fcntl definitions to ppc/target_fcntl.h 2018-06-04 01:30:44 +02:00
target_signal.h linux-user: move generic signal definitions to generic/signal.h 2018-06-04 01:30:44 +02:00
target_structs.h
target_syscall.h
termbits.h Supply missing header guards 2019-06-12 13:20:21 +02:00