Richard Henderson 1738860d7e target/arm: Convert rax1 to gvec helpers ... With this conversion, we will be able to use the same helpers with sve. This also fixes a bug in which we failed to clear the high bits of the SVE register after an AdvSIMD operation. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200514212831.31248-3-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2020-06-05 17:23:09 +01:00
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alpha
arm	target/arm: Convert rax1 to gvec helpers	2020-06-05 17:23:09 +01:00
cris
hppa	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00
i386	i386: Fix x86_cpu_load_model() error API violation	2020-05-27 07:45:45 +02:00
lm32
m68k	target/m68k: implement opcode fetoxm1	2020-06-02 13:59:02 +02:00
microblaze
mips	target/mips: Support variable page size	2020-06-01 13:28:21 +02:00
moxie
nios2
openrisc	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00
ppc	target/ppc: Use tcg_gen_gvec_rotlv	2020-06-02 08:42:37 -07:00
riscv	target/riscv: Add the lowRISC Ibex CPU	2020-06-03 09:11:51 -07:00
rx
s390x	target/s390x: Use tcg_gen_gvec_rotl{i,s,v}	2020-06-02 08:42:37 -07:00
sh4
sparc	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00
tilegx
tricore	target/tricore: Implement gdbstub	2020-06-01 16:55:13 +02:00
unicore32	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00
xtensa	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00