596 lines
14 KiB
C
596 lines
14 KiB
C
/*
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* Floppy test cases.
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*
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* Copyright (c) 2012 Kevin Wolf <kwolf@redhat.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdint.h>
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#include <string.h>
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#include <stdio.h>
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#include <glib.h>
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#include "libqtest.h"
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#include "qemu-common.h"
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#define TEST_IMAGE_SIZE 1440 * 1024
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#define FLOPPY_BASE 0x3f0
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#define FLOPPY_IRQ 6
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enum {
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reg_sra = 0x0,
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reg_srb = 0x1,
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reg_dor = 0x2,
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reg_msr = 0x4,
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reg_dsr = 0x4,
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reg_fifo = 0x5,
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reg_dir = 0x7,
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};
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enum {
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CMD_SENSE_INT = 0x08,
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CMD_READ_ID = 0x0a,
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CMD_SEEK = 0x0f,
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CMD_VERIFY = 0x16,
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CMD_READ = 0xe6,
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CMD_RELATIVE_SEEK_OUT = 0x8f,
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CMD_RELATIVE_SEEK_IN = 0xcf,
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};
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enum {
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BUSY = 0x10,
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NONDMA = 0x20,
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RQM = 0x80,
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DIO = 0x40,
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DSKCHG = 0x80,
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};
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static char test_image[] = "/tmp/qtest.XXXXXX";
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#define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
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#define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
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static uint8_t base = 0x70;
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enum {
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CMOS_FLOPPY = 0x10,
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};
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static void floppy_send(uint8_t byte)
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{
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uint8_t msr;
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msr = inb(FLOPPY_BASE + reg_msr);
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assert_bit_set(msr, RQM);
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assert_bit_clear(msr, DIO);
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outb(FLOPPY_BASE + reg_fifo, byte);
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}
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static uint8_t floppy_recv(void)
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{
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uint8_t msr;
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msr = inb(FLOPPY_BASE + reg_msr);
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assert_bit_set(msr, RQM | DIO);
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return inb(FLOPPY_BASE + reg_fifo);
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}
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/* pcn: Present Cylinder Number */
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static void ack_irq(uint8_t *pcn)
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{
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uint8_t ret;
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g_assert(get_irq(FLOPPY_IRQ));
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floppy_send(CMD_SENSE_INT);
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floppy_recv();
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ret = floppy_recv();
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if (pcn != NULL) {
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*pcn = ret;
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}
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g_assert(!get_irq(FLOPPY_IRQ));
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}
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static uint8_t send_read_command(uint8_t cmd)
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{
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uint8_t drive = 0;
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uint8_t head = 0;
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uint8_t cyl = 0;
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uint8_t sect_addr = 1;
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uint8_t sect_size = 2;
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uint8_t eot = 1;
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uint8_t gap = 0x1b;
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uint8_t gpl = 0xff;
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uint8_t msr = 0;
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uint8_t st0;
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uint8_t ret = 0;
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floppy_send(cmd);
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floppy_send(head << 2 | drive);
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g_assert(!get_irq(FLOPPY_IRQ));
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floppy_send(cyl);
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floppy_send(head);
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floppy_send(sect_addr);
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floppy_send(sect_size);
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floppy_send(eot);
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floppy_send(gap);
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floppy_send(gpl);
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uint8_t i = 0;
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uint8_t n = 2;
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for (; i < n; i++) {
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msr = inb(FLOPPY_BASE + reg_msr);
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if (msr == 0xd0) {
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break;
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}
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sleep(1);
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}
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if (i >= n) {
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return 1;
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}
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st0 = floppy_recv();
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if (st0 != 0x40) {
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ret = 1;
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}
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floppy_recv();
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floppy_recv();
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floppy_recv();
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floppy_recv();
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floppy_recv();
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floppy_recv();
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return ret;
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}
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static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)
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{
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uint8_t drive = 0;
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uint8_t head = 0;
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uint8_t cyl = 0;
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uint8_t sect_addr = 1;
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uint8_t sect_size = 2;
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uint8_t eot = nb_sect;
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uint8_t gap = 0x1b;
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uint8_t gpl = 0xff;
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uint8_t msr = 0;
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uint8_t st0;
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uint8_t ret = 0;
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floppy_send(CMD_READ);
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floppy_send(head << 2 | drive);
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g_assert(!get_irq(FLOPPY_IRQ));
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floppy_send(cyl);
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floppy_send(head);
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floppy_send(sect_addr);
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floppy_send(sect_size);
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floppy_send(eot);
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floppy_send(gap);
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floppy_send(gpl);
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uint16_t i = 0;
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uint8_t n = 2;
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for (; i < n; i++) {
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msr = inb(FLOPPY_BASE + reg_msr);
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if (msr == (BUSY | NONDMA | DIO | RQM)) {
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break;
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}
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sleep(1);
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}
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if (i >= n) {
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return 1;
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}
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/* Non-DMA mode */
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for (i = 0; i < 512 * 2 * nb_sect; i++) {
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msr = inb(FLOPPY_BASE + reg_msr);
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assert_bit_set(msr, BUSY | RQM | DIO);
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inb(FLOPPY_BASE + reg_fifo);
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}
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msr = inb(FLOPPY_BASE + reg_msr);
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assert_bit_set(msr, BUSY | RQM | DIO);
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g_assert(get_irq(FLOPPY_IRQ));
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st0 = floppy_recv();
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if (st0 != expected_st0) {
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ret = 1;
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}
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floppy_recv();
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floppy_recv();
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floppy_recv();
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floppy_recv();
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floppy_recv();
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g_assert(get_irq(FLOPPY_IRQ));
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floppy_recv();
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/* Check that we're back in command phase */
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msr = inb(FLOPPY_BASE + reg_msr);
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assert_bit_clear(msr, BUSY | DIO);
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assert_bit_set(msr, RQM);
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g_assert(!get_irq(FLOPPY_IRQ));
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return ret;
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}
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static void send_seek(int cyl)
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{
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int drive = 0;
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int head = 0;
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floppy_send(CMD_SEEK);
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floppy_send(head << 2 | drive);
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g_assert(!get_irq(FLOPPY_IRQ));
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floppy_send(cyl);
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ack_irq(NULL);
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}
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static uint8_t cmos_read(uint8_t reg)
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{
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outb(base + 0, reg);
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return inb(base + 1);
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}
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static void test_cmos(void)
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{
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uint8_t cmos;
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cmos = cmos_read(CMOS_FLOPPY);
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g_assert(cmos == 0x40 || cmos == 0x50);
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}
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static void test_no_media_on_start(void)
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{
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uint8_t dir;
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/* Media changed bit must be set all time after start if there is
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* no media in drive. */
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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send_seek(1);
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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}
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static void test_read_without_media(void)
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{
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uint8_t ret;
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ret = send_read_command(CMD_READ);
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g_assert(ret == 0);
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}
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static void test_media_insert(void)
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{
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uint8_t dir;
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/* Insert media in drive. DSKCHK should not be reset until a step pulse
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* is sent. */
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qmp_discard_response("{'execute':'change', 'arguments':{"
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" 'device':'floppy0', 'target': %s, 'arg': 'raw' }}",
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test_image);
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qmp_discard_response(""); /* ignore event (open -> close) */
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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send_seek(0);
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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/* Step to next track should clear DSKCHG bit. */
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send_seek(1);
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_clear(dir, DSKCHG);
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_clear(dir, DSKCHG);
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}
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static void test_media_change(void)
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{
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uint8_t dir;
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test_media_insert();
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/* Eject the floppy and check that DSKCHG is set. Reading it out doesn't
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* reset the bit. */
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qmp_discard_response("{'execute':'eject', 'arguments':{"
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" 'device':'floppy0' }}");
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qmp_discard_response(""); /* ignore event */
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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send_seek(0);
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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send_seek(1);
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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dir = inb(FLOPPY_BASE + reg_dir);
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assert_bit_set(dir, DSKCHG);
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}
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static void test_sense_interrupt(void)
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{
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int drive = 0;
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int head = 0;
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int cyl = 0;
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int ret = 0;
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floppy_send(CMD_SENSE_INT);
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ret = floppy_recv();
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g_assert(ret == 0x80);
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floppy_send(CMD_SEEK);
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floppy_send(head << 2 | drive);
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g_assert(!get_irq(FLOPPY_IRQ));
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floppy_send(cyl);
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floppy_send(CMD_SENSE_INT);
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ret = floppy_recv();
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g_assert(ret == 0x20);
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floppy_recv();
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}
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static void test_relative_seek(void)
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{
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uint8_t drive = 0;
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uint8_t head = 0;
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uint8_t cyl = 1;
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uint8_t pcn;
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/* Send seek to track 0 */
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send_seek(0);
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/* Send relative seek to increase track by 1 */
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floppy_send(CMD_RELATIVE_SEEK_IN);
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floppy_send(head << 2 | drive);
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g_assert(!get_irq(FLOPPY_IRQ));
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floppy_send(cyl);
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ack_irq(&pcn);
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g_assert(pcn == 1);
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/* Send relative seek to decrease track by 1 */
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floppy_send(CMD_RELATIVE_SEEK_OUT);
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floppy_send(head << 2 | drive);
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g_assert(!get_irq(FLOPPY_IRQ));
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floppy_send(cyl);
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ack_irq(&pcn);
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g_assert(pcn == 0);
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}
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static void test_read_id(void)
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{
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uint8_t drive = 0;
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uint8_t head = 0;
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uint8_t cyl;
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uint8_t st0;
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uint8_t msr;
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/* Seek to track 0 and check with READ ID */
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send_seek(0);
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floppy_send(CMD_READ_ID);
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g_assert(!get_irq(FLOPPY_IRQ));
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floppy_send(head << 2 | drive);
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msr = inb(FLOPPY_BASE + reg_msr);
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if (!get_irq(FLOPPY_IRQ)) {
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assert_bit_set(msr, BUSY);
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assert_bit_clear(msr, RQM);
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}
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while (!get_irq(FLOPPY_IRQ)) {
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/* qemu involves a timer with READ ID... */
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clock_step(1000000000LL / 50);
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}
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msr = inb(FLOPPY_BASE + reg_msr);
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assert_bit_set(msr, BUSY | RQM | DIO);
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st0 = floppy_recv();
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floppy_recv();
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floppy_recv();
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cyl = floppy_recv();
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head = floppy_recv();
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floppy_recv();
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g_assert(get_irq(FLOPPY_IRQ));
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floppy_recv();
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g_assert(!get_irq(FLOPPY_IRQ));
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g_assert_cmpint(cyl, ==, 0);
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g_assert_cmpint(head, ==, 0);
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g_assert_cmpint(st0, ==, head << 2);
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/* Seek to track 8 on head 1 and check with READ ID */
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head = 1;
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cyl = 8;
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floppy_send(CMD_SEEK);
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floppy_send(head << 2 | drive);
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g_assert(!get_irq(FLOPPY_IRQ));
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floppy_send(cyl);
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g_assert(get_irq(FLOPPY_IRQ));
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ack_irq(NULL);
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floppy_send(CMD_READ_ID);
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g_assert(!get_irq(FLOPPY_IRQ));
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floppy_send(head << 2 | drive);
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msr = inb(FLOPPY_BASE + reg_msr);
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if (!get_irq(FLOPPY_IRQ)) {
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assert_bit_set(msr, BUSY);
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assert_bit_clear(msr, RQM);
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}
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while (!get_irq(FLOPPY_IRQ)) {
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/* qemu involves a timer with READ ID... */
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clock_step(1000000000LL / 50);
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}
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msr = inb(FLOPPY_BASE + reg_msr);
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assert_bit_set(msr, BUSY | RQM | DIO);
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st0 = floppy_recv();
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floppy_recv();
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floppy_recv();
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cyl = floppy_recv();
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head = floppy_recv();
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floppy_recv();
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g_assert(get_irq(FLOPPY_IRQ));
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floppy_recv();
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g_assert(!get_irq(FLOPPY_IRQ));
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g_assert_cmpint(cyl, ==, 8);
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g_assert_cmpint(head, ==, 1);
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g_assert_cmpint(st0, ==, head << 2);
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}
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static void test_read_no_dma_1(void)
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{
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uint8_t ret;
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outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
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send_seek(0);
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ret = send_read_no_dma_command(1, 0x04);
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g_assert(ret == 0);
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}
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static void test_read_no_dma_18(void)
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{
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uint8_t ret;
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outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
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send_seek(0);
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ret = send_read_no_dma_command(18, 0x04);
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g_assert(ret == 0);
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}
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static void test_read_no_dma_19(void)
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{
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uint8_t ret;
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outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
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send_seek(0);
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ret = send_read_no_dma_command(19, 0x20);
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g_assert(ret == 0);
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}
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static void test_verify(void)
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{
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uint8_t ret;
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ret = send_read_command(CMD_VERIFY);
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g_assert(ret == 0);
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}
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/* success if no crash or abort */
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static void fuzz_registers(void)
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{
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unsigned int i;
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for (i = 0; i < 1000; i++) {
|
|
uint8_t reg, val;
|
|
|
|
reg = (uint8_t)g_test_rand_int_range(0, 8);
|
|
val = (uint8_t)g_test_rand_int_range(0, 256);
|
|
|
|
outb(FLOPPY_BASE + reg, val);
|
|
inb(FLOPPY_BASE + reg);
|
|
}
|
|
}
|
|
|
|
int main(int argc, char **argv)
|
|
{
|
|
const char *arch = qtest_get_arch();
|
|
int fd;
|
|
int ret;
|
|
|
|
/* Check architecture */
|
|
if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
|
|
g_test_message("Skipping test for non-x86\n");
|
|
return 0;
|
|
}
|
|
|
|
/* Create a temporary raw image */
|
|
fd = mkstemp(test_image);
|
|
g_assert(fd >= 0);
|
|
ret = ftruncate(fd, TEST_IMAGE_SIZE);
|
|
g_assert(ret == 0);
|
|
close(fd);
|
|
|
|
/* Run the tests */
|
|
g_test_init(&argc, &argv, NULL);
|
|
|
|
qtest_start(NULL);
|
|
qtest_irq_intercept_in(global_qtest, "ioapic");
|
|
qtest_add_func("/fdc/cmos", test_cmos);
|
|
qtest_add_func("/fdc/no_media_on_start", test_no_media_on_start);
|
|
qtest_add_func("/fdc/read_without_media", test_read_without_media);
|
|
qtest_add_func("/fdc/media_change", test_media_change);
|
|
qtest_add_func("/fdc/sense_interrupt", test_sense_interrupt);
|
|
qtest_add_func("/fdc/relative_seek", test_relative_seek);
|
|
qtest_add_func("/fdc/read_id", test_read_id);
|
|
qtest_add_func("/fdc/verify", test_verify);
|
|
qtest_add_func("/fdc/media_insert", test_media_insert);
|
|
qtest_add_func("/fdc/read_no_dma_1", test_read_no_dma_1);
|
|
qtest_add_func("/fdc/read_no_dma_18", test_read_no_dma_18);
|
|
qtest_add_func("/fdc/read_no_dma_19", test_read_no_dma_19);
|
|
qtest_add_func("/fdc/fuzz-registers", fuzz_registers);
|
|
|
|
ret = g_test_run();
|
|
|
|
/* Cleanup */
|
|
qtest_end();
|
|
unlink(test_image);
|
|
|
|
return ret;
|
|
}
|