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qemu-e2k/target-arm
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Peter Maydell d9e028c1d9 target-arm: Decode SETEND correctly in Thumb 
Decode the SETEND instruction correctly in Thumb mode,
rather than accidentally treating it like CPS. We don't
support BE8 mode, but this change brings the Thumb mode
in to line with behaviour in ARM mode: 'SETEND BE' is
not supported and will provoke an UNDEF exception, but
'SETEND LE' is correctly handled as a no-op.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reported-by: Daniel Forsgren <daniel.forsgren@enea.com>
Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com>
2012-03-15 17:00:55 +00:00
..
cpu.h Rename CPUState -> CPUArchState 2012-03-14 22:20:27 +01:00
helper.c target-arm: Clear IT bits when taking exceptions in v7M 2012-03-15 17:00:52 +00:00
helper.h target-arm: Implement VFPv4 fused multiply-accumulate insns 2011-10-19 16:14:07 +00:00
iwmmxt_helper.c target-arm: Don't overuse CPUState 2012-03-14 22:20:24 +01:00
machine.c arm: Add dummy support for co-processor 15's secure config register 2012-01-13 17:25:08 +00:00
neon_helper.c target-arm: Don't overuse CPUState 2012-03-14 22:20:24 +01:00
op_addsub.h
op_helper.c target-arm: Don't overuse CPUState 2012-03-14 22:20:24 +01:00
translate.c target-arm: Decode SETEND correctly in Thumb 2012-03-15 17:00:55 +00:00