51 lines
1.4 KiB
C
51 lines
1.4 KiB
C
#ifndef XTENSA_TARGET_SYSCALL_H
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#define XTENSA_TARGET_SYSCALL_H
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#define UNAME_MACHINE "xtensa"
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#define UNAME_MINIMUM_RELEASE "3.19"
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#define TARGET_CLONE_BACKWARDS
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#define MMAP_SHIFT TARGET_PAGE_BITS
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typedef uint32_t xtensa_reg_t;
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typedef struct {
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} xtregs_opt_t; /* TODO */
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struct target_pt_regs {
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xtensa_reg_t pc; /* 4 */
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xtensa_reg_t ps; /* 8 */
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xtensa_reg_t depc; /* 12 */
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xtensa_reg_t exccause; /* 16 */
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xtensa_reg_t excvaddr; /* 20 */
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xtensa_reg_t debugcause; /* 24 */
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xtensa_reg_t wmask; /* 28 */
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xtensa_reg_t lbeg; /* 32 */
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xtensa_reg_t lend; /* 36 */
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xtensa_reg_t lcount; /* 40 */
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xtensa_reg_t sar; /* 44 */
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xtensa_reg_t windowbase; /* 48 */
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xtensa_reg_t windowstart; /* 52 */
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xtensa_reg_t syscall; /* 56 */
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xtensa_reg_t icountlevel; /* 60 */
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xtensa_reg_t scompare1; /* 64 */
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xtensa_reg_t threadptr; /* 68 */
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/* Additional configurable registers that are used by the compiler. */
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xtregs_opt_t xtregs_opt;
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/* Make sure the areg field is 16 bytes aligned. */
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int align[0] __attribute__ ((aligned(16)));
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/* current register frame.
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* Note: The ESF for kernel exceptions ends after 16 registers!
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*/
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xtensa_reg_t areg[16];
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};
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#define TARGET_MCL_CURRENT 1
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#define TARGET_MCL_FUTURE 2
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#define TARGET_MCL_ONFAULT 4
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#endif
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