qemu-e2k/target/s390x
David Hildenbrand 19d70587b5 target/s390x: Allow to enable "idtes" feature for TCG
STFL bit 4 and 5 are just indications to the guest, which TLB entries an
IDTE call will clear. These are performance indicators for the guest.

STFL bit 4:
    INVALIDATE DAT TABLE ENTRY (IDTE) performs
    the invalidation-and-clearing operation by
    selectively clearing TLB segment-table entries
    when a segment-table entry or entries are
    invalidated. IDTE also performs the clearing-by-
    ASCE operation. Unless bit 4 is one, IDTE simply
    purges all TLBs. Bit 3 is one if bit 4 is one.

We can simply set STFL bit 4 ("idtes") and still purge the complete TLB.
Purging more than advertised is never bad. E.g. Linux doesn't even care
about this bit. We can optimized this later.
This is helpful, as the z9 base model contains this facility.

STFL bit 5 (clearing TLB region-table-entries) was never implemented on
real HW, therefore we can simply ignore it for now.

Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20170627161032.5014-1-david@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-07-17 14:13:17 -07:00
..
Makefile.objs makefile: merge GENERATED_HEADERS & GENERATED_SOURCES variables 2017-03-16 11:51:15 +08:00
arch_dump.c s390x/arch_dump: also dump guarded storage control block 2017-07-14 12:29:49 +02:00
cc_helper.c
cpu-qom.h
cpu.c migration: Remove unneeded includes of migration/vmstate.h 2017-06-01 18:49:22 +02:00
cpu.h s390x/kvm: enable guarded storage 2017-07-14 12:29:49 +02:00
cpu_features.c s390x/cpumodel: we are always in zarchitecture mode 2017-07-14 12:29:49 +02:00
cpu_features.h s390x/cpumodel: wire up new hardware features 2017-07-14 12:29:49 +02:00
cpu_features_def.h s390x/cpumodel: wire up new hardware features 2017-07-14 12:29:49 +02:00
cpu_models.c target/s390x: Allow to enable "idtes" feature for TCG 2017-07-17 14:13:17 -07:00
cpu_models.h s390x/cpumodel: provide compat handling for new cpu features 2017-07-14 12:29:47 +02:00
fpu_helper.c target/s390x: implement COMPARE AND SIGNAL 2017-06-06 15:20:38 -07:00
gdbstub.c s390x/gdb: add gs registers 2017-07-14 12:29:49 +02:00
gen-features.c s390x/cpumodel: add esop/esop2 to z12 model 2017-07-14 12:29:49 +02:00
helper.c target/s390x: rework PGM interrupt psw.addr handling 2017-06-13 11:09:39 -07:00
helper.h target/s390x: Implement TRTR 2017-07-17 14:13:17 -07:00
insn-data.def target/s390x: Implement TRTR 2017-07-17 14:13:17 -07:00
insn-format.def target/s390x: Implement load-on-condition-2 insns 2017-06-23 09:17:44 -07:00
int_helper.c target-s390x: Avoid a loop for popcnt 2017-01-10 08:48:57 -08:00
interrupt.c
ioinst.c s390x/css: fence off MIDA 2017-06-06 10:17:11 +02:00
kvm.c s390x/kvm: enable guarded storage 2017-07-14 12:29:49 +02:00
machine.c s390x/kvm: enable guarded storage 2017-07-14 12:29:49 +02:00
mem_helper.c target/s390x: Implement TRTR 2017-07-17 14:13:17 -07:00
misc_helper.c s390x/cpumodel: wire up cpu type + id for TCG 2017-06-13 11:09:39 -07:00
mmu_helper.c target/s390x: rework PGM interrupt psw.addr handling 2017-06-13 11:09:39 -07:00
trace-events
translate.c target/s390x: Implement TRTR 2017-07-17 14:13:17 -07:00